
5
Timing Waveforms
NOTES:
4. SN: N-th sampling period.
5. HN: N-th holding period.
6. BM, N: M-th stage digital output corresponding to N-th sampled input.
7. DN: Final data output corresponding to N-th sampled input.
FIGURE 1. INTERNAL CIRCUIT TIMING
FIGURE 2. INPUT-TO-OUTPUT TIMING
ANALOG
INPUT
CLOCK
INPUT
S/H
1ST
STAGE
2ND
STAGE
3RD
STAGE
4TH
STAGE
DATA
OUTPUT
SN-1
HN - 1
SN
HN
SN + 1 HN + 1 SN + 2 HN + 2 SN + 3 HN + 3
SN+4
HN + 4 SN + 5 HN + 5 SN + 6 HN + 6
B1, N + 5
B1, N + 4
B1, N + 3
B1, N + 2
B1, N + 1
B1, N
B1, N - 1
B2, N - 2
B3, N - 2
B4, N - 3
DN - 3
B2, N - 1
B3, N - 1
B4, N - 2
DN - 2
tLAT
DN - 1
B4, N - 1
B2, N
B3, N
B2, N + 1
B3, N + 1
B4, N
DN
DN + 1
B4, N + 1
B2, N + 2
B2, N + 3
B3, N + 2
B4, N + 2
DN + 2
B3, N + 3
B2, N + 4
B3, N + 4
B4, N + 3
DN + 3
tOD
tH
DATA N - 1
DATA N
CLOCK
INPUT
DATA
OUTPUT
0.8V
2.0V
1.5V
tAP
ANALOG
INPUT
tAJ
1.5V
HI5805