參數(shù)資料
型號: HI5634
廠商: Intersil Corporation
英文描述: High Performance Programmable Phase-Locked Loop for LCD Applications
中文描述: 高性能可編程鎖相環(huán)環(huán)路,用于LCD應(yīng)用
文件頁數(shù): 14/16頁
文件大小: 131K
代理商: HI5634
14
Output Timing Diagram
Timing when Register 2[0] = 0 (Total Number of Pixels is Even).
HSYNC
REF
PECL CLK-
PECL CLK+
SSTL CLK
FUNC
PECL CLK/2+
PECL CLK/2-
SSTL CLK/2
EVEN TOTAL PIXELS
t
0
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
R
t
S
t
F
t
P
HI5634
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