參數(shù)資料
型號: HF88M02
廠商: King Billion Electronics Co., Ltd.
英文描述: 256K x 8 bit Mask ROM
中文描述: 256K × 8位掩模ROM
文件頁數(shù): 4/19頁
文件大?。?/td> 322K
代理商: HF88M02
King Billion Electronics Co., Ltd
駿 億 電 子 股 份 有 限 公 司
HF88M02
January 16, 2004
This specification is subject to change without notice. Please contact sales person for the latest version before use.
Page 4 of 19
V1.11
4
Pin Description
HF88M02-PLCC32
11
12
2
9
8
7
6
5
4
29
28
27
26
24
23
22
3
3
3
2
25
13
1
1
1
1
2
21
3
1
1
1
P01
P00
P02
P03
P04
P05
P06
P07
P
P16
P15
P10
P11
OE
P12
CE
P
R
R
R
P13
D0
D
D
D
D
D
D7
V
V
W
D
Symbol
VDD
VSS
CEn
Pin No. I/O
32
16
22
Description
P Positive power supply input pin.
P Gound pin.
I
The CEn (Chip Enable) input is the device selection and power control for
internal Mask ROM array. Whenever CEn goes high, the internal Mask
ROM will enter standby (power saving) mode and accesses to internal
registers are inhibited. Otherwise, it is in active mode and the contents of
the ROM and registers can be accessed. Please note that only accesses to
the internal registers are inhibited, but the status of I/O registers are not
affected by the CEn pin and will remain unchanged. CEn is also useful to
uniquely select a certain device for applications where multiple-chip array is
required.
I
WEn controls writing to internal registers such as the Output Port Registers,
Direction Registers, Address Counter and Data on D7 ~ D0 are latched on
the rising edge of the WE pulse. The WEn (Write Enable) input is internally
pulled-up to VDD to prevent pin floating. So this pin should stay at ‘1’
state when inactive to prevent unintended current consumption.
I
OEn (Output Enable) is the output control which gates ROM array data,
expansion I/O ports, Direction Registers to the data I/O pins D7 ~ D0. The
internal Address Counter will automatically increment by one with each
rising edge of OEn pin in Sequentially Read mode.
I
Register Select pins RS2 ~ RS0 for accessing ROM data, Address Counter,
as well as expansion I/O ports. The RS2 (Register Select) input is internally
pulled-down to Ground. So this pin should stay at ‘0’ state when inactive to
prevent unintended current drain.
I/O Bi-directional I/O port P1.
I/O Bi-directional I/O port P0.
WEn
1
OEn
24
RS2~RS0
P17 ~ P10
P07 ~ P00
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