ix
11.5.4 System Reset by
WDTOVF
Signal...................................................................... 409
11.5.5 Internal Reset in Watchdog Timer Mode............................................................. 409
Section 12 Serial Communication Interface (SCI)
.................................................... 411
12.1 Overview............................................................................................................................ 411
12.1.1 Features ................................................................................................................ 411
12.1.2 Block Diagram...................................................................................................... 413
12.1.3 Pin Configuration ................................................................................................. 414
12.1.4 Register Configuration ......................................................................................... 415
12.2 Register Descriptions......................................................................................................... 416
12.2.1 Receive Shift Register (RSR)............................................................................... 416
12.2.2 Receive Data Register (RDR).............................................................................. 416
12.2.3 Transmit Shift Register (TSR).............................................................................. 417
12.2.4 Transmit Data Register (TDR)............................................................................. 417
12.2.5 Serial Mode Register (SMR)................................................................................ 418
12.2.6 Serial Control Register (SCR).............................................................................. 421
12.2.7 Serial Status Register (SSR)................................................................................. 425
12.2.8 Bit Rate Register (BRR)....................................................................................... 428
12.2.9 Smart Card Mode Register (SCMR).................................................................... 437
12.2.10 Module Stop Control Register (MSTPCR).......................................................... 438
12.3 Operation ........................................................................................................................... 439
12.3.1 Overview.............................................................................................................. 439
12.3.2 Operation in Asynchronous Mode........................................................................ 441
12.3.3 Multiprocessor Communication Function............................................................ 452
12.3.4 Operation in Clocked Synchronous Mode ........................................................... 460
12.4 SCI Interrupts .................................................................................................................... 468
12.5 Usage Notes....................................................................................................................... 469
Section 13 Smart Card Interface
...................................................................................... 473
13.1 Overview............................................................................................................................ 473
13.1.1 Features ................................................................................................................ 473
13.1.2 Block Diagram...................................................................................................... 474
13.1.3 Pin Configuration ................................................................................................. 475
13.1.4 Register Configuration ......................................................................................... 476
13.2 Register Descriptions......................................................................................................... 477
13.2.1 Smart Card Mode Register (SCMR).................................................................... 477
13.2.2 Serial Status Register (SSR)................................................................................. 478
13.2.3 Serial Mode Register (SMR)................................................................................ 480
13.2.4 Serial Control Register (SCR).............................................................................. 481
13.3 Operation ........................................................................................................................... 482
13.3.1 Overview.............................................................................................................. 482
13.3.2 Pin Connections.................................................................................................... 482
13.3.3 Data Format.......................................................................................................... 484