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參數(shù)資料
| 型號(hào)： | HE8P160(S) |
| 文件頁(yè)數(shù)： | 6/17頁(yè) |
| 文件大?。?/td> | 390K |
| 代理商： | HE8P160(S) |
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E. LCD RAM Map
KING BILLION ELECTRONICS CO., LTD
駿
億
電
子
股
份
有
限
公
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HE8P160E
HE80000 Series
6
Preliminary V1.3E
Page 0:
SEG1
COM[3:0] COM[3:0]
SEG3
COM[3:0] COM[3:0]
SEG5
COM[3:0] COM[3:0]
SEG7
COM[3:0] COM[3:0]
SEG9
COM[3:0] COM[3:0]
SEG11
COM[3:0] COM[3:0]
SEG13
COM[3:0] COM[3:0]
SEG15
COM[3:0] COM[3:0]
SEG0
SEG17
COM[3:0] COM[3:0]
SEG19
COM[3:0] COM[3:0]
SEG21
COM[3:0] COM[3:0]
SEG23
COM[3:0] COM[3:0]
SEG25
COM[3:0] COM[3:0]
SEG27
COM[3:0] COM[3:0]
SEG29
COM[3:0] COM[3:0]
SEG31
COM[3:0] COM[3:0]
SEG16
F0H
F8H
SEG2
SEG18
F1H
F9H
SEG4
SEG20
F2H
FAH
SEG6
SEG22
F3H
FBH
SEG8
SEG24
F4H
FCH
SEG10
SEG26
F5H
FDH
SEG12
SEG28
F6H
FEH
SEG14
SEG30
F7H
FFH
F. Build-in 8-channel ADC
HE8P160 built in 8-channel 12-bit ADC with 125 KHz sampling rate are pin-shared with port C, it
contain sample and hold circuit. User can set
MO_PRTC_ADC [3:0] to select what kind of input. User
can set the ADC control register by writing setting to PRTC or obtain the ADC converted data by reading
the PRTC, refer to following table for more details;
The read data is high byte or low nibble, depends
on ADC control register setting. The ADC data register has only one set, so if there is more than one
channel application, it should be saved previous ADC sample data, then switch to another channel to
sample ADC data again.
When ADC[7]=0, the whole ADC block will turn on. This chip provides two kind of method to start
ADC converting which are software interrupt and hardware interrupt (Timer). When ADC[5]=1, the
start of covert ADC sample is triggered by rising edge of ADC[6]; the ADC hardware will begin to
sample, the translation time must large than 150
μ
s and the user should notice this point, otherwise it
will fetch the unstable data. The disadvantage of software trigger is that ADC may produce jitter
effect in sample data, such as voice sample, but the advantage of software trigger is that it can
process 1 to 8 channel sample data; it is suitable for the application less sensitive on phase jitter
issue.
The other way to trigger ADC to convert data is by Timer 1 interrupt; when interrupt happen, the
sample data will be sampled and store in ADC data register, user can read back the sampled data.
The advantage of using Timer 1 interrupt to trigger ADC is to avoid the phase jitter and calculation
the delay sample time.
The ADC[4] bit is used to select the high byte or low nibble of sampled data and ADC[3] is the
clock source selection used to select the clock source of ADC which comes from fast clock divided
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