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參數(shù)資料
| 型號： | HE8P160(S) |
| 文件頁數(shù)： | 5/17頁 |
| 文件大?。?/td> | 390K |
| 代理商： | HE8P160(S) |
KING BILLION ELECTRONICS CO., LTD
駿
億
電
子
股
份
有
限
公
司
HE8P160E
HE80000 Series
5
Preliminary V1.3E
Pin#
34
35
36
37
38, 39
45
44
48
47
46
Pin Name
SEG[5]/SCLK
SEG[4]/D_CN
SEG[3]/R_WN
O Segment/ OTP writing pin
SEG[2]/P_SN
O Segment/ OTP writing pin
SEG[1:0]
O LCD segment Output
LC2
B Charge Pump Switch 1
LC1
B Charge Pump Switch 2
L V3
B Charge Pump V3
L V2
B Charge Pump V2
L V1
B Charge Pump V1
O speaker or buzzer directly.
O drive speaker or buzzer directly.
O The PWM negative output can
drive speaker or buzzer directly.
VO
O D/A voice output.
OPIN
I Negative input of OP comparator
OPIP
I Positive input of OP comparator
OPO
O OPAMP output pin
I/O
O Segment/ OTP writing pin
O Segment/ OTP writing pin
Function
Description
Refer to application circuit.
63
PWM
Set Bit2 (PWM=1) of VOC register to turn on PWM.
65
PWMP
Set Bit2 (PWM=1) of VOC register to turn on PWM.
64
PWMN
S Set Bit2 (PWM=1) of VOC register to turn on PWM.
69
67
68
66
Set Bit1 (DA=1) of VOC register to turn on VO.
Set the bit0 (OP=1) of VOC register to turn on OP
comparator.
The operating range between 0 ~ (VDD-1).
Through Port12
，
can turn on/off
DTMF & write data
.
Use Mask Option MO_DTMFSCK set clock source
：
MO_DTMFSCK=0, Clock Source=3.579545 MHz
=1
；
Clock Source=32768 Hz
MUTE
can be turned on/off by Port12.
SDO & write data
can be turned on/off by Port12.
KEYTONE
can be turned on/off by Port12.
Used for program download
Tie this pin to reference Input: 1V to VDDA
Tie this pin to VSSA
59
DTMFO
O DTMF Output
58
60
61
57
78
79
56
49
81
80
7
62
MUTE
SDO
KEYTONE
LOADER
VREFP
VREFN
VDD
GND
VDDA
VSSA
VPP
GND_PWM
O MUTE Output for Dialer
O SDO for Dialer Application
O 1024 Hz 50% Duty square wave
I Define Loader Mode
I ADC positive voltage reference
I ADC negative voltage reference
P Digital Positive Power
P Digital Power Ground
P Analog Positive Power
P Analog Power Ground
P OTP high voltage power
P Dedicated GND for PWM
Adding 0.1 μF capacitor as by-pass capacitor on each set
is necessary.
VDDA and VSSA must always be tied to high and low.
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