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參數(shù)資料
| 型號(hào)： | HDSP-713G |
| 元件分類： | 數(shù)字電位計(jì) |
| 英文描述： | 392 Series Industrial Potentiometer, Conductive Plastic Element, PC Terminals, 0.5 W Power Rating, 2.5 kOhm Resistance Value |
| 中文描述： | 17.3毫米（0.68英寸）通用5x7點(diǎn)陣的字母數(shù)字顯示器 |
| 文件頁(yè)數(shù)： | 9/16頁(yè) |
| 文件大?。?/td> | 458K |
| 代理商： | HDSP-713G |
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9
Electrical Description
Pin Function
Description
RESET (RST, pin 1)
Initializes the display.
FLASH (FL, pin 2)
FL low indicates an access to the Flash RAM and is unaffected by the
state of address lines A
3
-A
4
.
Each location in memory has a distinct address. Address inputs (A
0
-A
2
)
select a specific location in the Character RAM, the Flash RAM or a
particular row in the UDC (User-Defined Character) RAM. A
3
-A
4
are
used to select which section of memory is accessed. Table 1 shows the
logic levels needed to access each section of memory.
ADDRESS INPUTS
(A
0
-A
4
, pins 3-6, 10)
Table 1. Logic Levels to Access Memory
Section of Memory
FL
A
4
X
A
3
X
A
2
A
1
A
0
Char. Address
Flash RAM
0
UDC Address Register
1
0
0
Don't Care
UDC RAM
1
0
1
Row Address
Control Word Register
1
1
0
Don’t Care
Character RAM
1
1
1
Character Address
CLOCK SELECT
(CLS, pin 11)
Used to select either an internal (CLS = 1) or external (CLS = 0) clock source.
CLOCK INPUT/OUTPUT
(CLK, pin 12)
Outputs the master clock (CLS = 1) or inputs a clock (CLS = 0) for slave
displays.
WRITE (WR, pin 13)
Data is written into the display when the WR input is low and the
CE input is low.
CHIP ENABLE (CE, pin 17)
Must be at a logic low to read or write data to the display and must go
high between each read and write cycle.
READ (RD, pin 18)
Data is read from the display when the RD input is low and the CE
input is low.
DATA Bus (D
0
-D
7
,
pins 19, 20, 23-28)
Used to read from or write to the display.
GND (SUPPLY) (pin 15)
Analog ground for the LED drivers.
GND (LOGIC) (pin 16)
Digital ground for internal logic.
V
DD
(POWER) (pin 14)
Positive power supply input.
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