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參數(shù)資料
| 型號： | HD74LV573A |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | Octal D-type Transparent Latches with 3-state Outputs |
| 中文描述： | 八路D型透明鎖存器與三態(tài)輸出 |
| 文件頁數(shù)： | 8/16頁 |
| 文件大?。?/td> | 66K |
| 代理商： | HD74LV573A |
HD74LV573A
8
Switching Characteristics (cont)
V
CC
= 5.0
±
0.5 V
Ta = 25
°
C
Ta = –40 to 85
°
C
Item
Symbol
Min
Typ
Max
Min
Max
Unit
Test Conditions
FROM
(Input)
TO
(Output)
Propa-
gation
delay
time
t
PLH
t
PHL
—
4.3
6.8
1.0
8.0
ns
C
L
= 15 pF
D
Q
—
4.7
7.7
1.0
9.0
LE
—
5.3
8.8
1.0
10.0
C
L
= 50 pF
D
—
5.7
9.7
1.0
11.0
LE
Enable
time
t
ZH
t
ZL
—
4.7
7.7
1.0
9.0
ns
C
L
= 15 pF
OE
Q
—
5.7
9.7
1.0
11.0
C
L
= 50 pF
Disable
time
t
HZ
t
LZ
—
3.5
7.7
1.0
9.0
ns
C
L
= 15 pF
OE
Q
—
4.2
9.7
1.0
11.0
C
L
= 50 pF
Setup
time
t
su
3.5
—
—
3.5
—
ns
Data before LE
↓
Hold
time
t
h
1.5
—
—
1.5
—
ns
Data after LE
↓
Pulse
width
t
w
5.0
—
—
5.0
—
ns
LE “H”
Output-skew Characteristics
Ta = 25
°
C
Ta = –40 to 85
°
C
Item
Symbol
V
CC
(V)
2.3 to 2.7
Min
Typ
Max
Min
Max
Unit
Output skew
t
sk (O)
—
—
2.0
—
2.0
ns
3.0 to 3.6
—
—
1.5
—
1.5
4.5 to 5.5
—
—
1.0
—
1.0
Note:
Skew between any outputs of the same package switching in the same direction. This parameter is
warranted but not production tested.
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