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參數(shù)資料
| 型號： | HD74HCT241FPEL |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | HCT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| 封裝： | 5.50 X 12.60 MM, 1.27 PITCH, PLASTIC, SOP-20 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大小： | 94K |
| 代理商： | HD74HCT241FPEL |
Rev.2.00 Mar 30, 2006 page 1 of 7
HD74HCT241
Octal Buffers/Line Drivers/Line Receivers
(with inverted 3-state outputs)
REJ03D0663–0200
(Previous ADE-205-551)
Rev.2.00
Mar 30, 2006
Description
The HD74HCT241 is a noninverting buffer and has one active low enable and one active high enable. Each enable
independently controls 4 buffers.
This device does not have schmitt trigger inputs.
Features
LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
High Speed Operation: t
pd (A to Y) = 10 ns typ (CL = 50 pF)
High Output Current: Fanout of 15 LSTTL Loads
Wide Operating Voltage: V
CC = 4.5 to 5.5 V
Low Input Current: 1 A max
Low Quiescent Supply Current: I
CC (static) = 4 A max (Ta = 25°C)
Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74HCT241P
DILP-20 pin
PRDP0020AC-B
(DP-20NEV)
P
—
HD74HCT241FPEL
SOP-20 pin (JEITA)
PRSP0020DD-B
(FP-20DAV)
FP
EL (2,000 pcs/reel)
HD74HCT241RPEL
SOP-20 pin (JEDEC)
PRSP0020DC-A
(FP-20DBV)
RP
EL (1,000 pcs/reel)
Note:
Please consult the sales office for the above package availability.
Function Table
Inputs
Output
1
G
2G
A
Y
H
L
X
Z
L
H
L
H
L
H :
high level
L
:
low level
X :
irrelevant
Z
:
off (high-impedance) state of a 3-state output
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