參數(shù)資料
型號: HD74HC4518FPEL
元件分類: 計數(shù)器
英文描述: HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, PDSO16
封裝: 5.50 X 10.06 MM, 1.27 MM PITCH, PLASTIC, SOP-16
文件頁數(shù): 1/9頁
文件大?。?/td> 116K
代理商: HD74HC4518FPEL
Rev.2.00, Mar 30, 2006 page 1 of 8
HD74HC4518, HD74HC4520
Dual BCD Up Counters
Dual Binary Up Counters
REJ03D0653–0200
(Previous ADE-205-542)
Rev.2.00
Mar 30, 2006
Description
The HD74HC4518 dual BCD counter and the HD74HC4520 dual binary counter consist of two identical, independent,
internally synchronous 4-stage counters. The counter stages are type D flip-flops, with interchangeable Clock and
Enable lines for incrementing on either the positive-going or negative-going transition as required when cascading
multiple stages. Each counter can be cleared by applying a high level on the Reset line. In addition, the HD74HC4518
will count out of all undefined states within two clock periods. These complementary MOS up counters find primary
use in multi-stage synchronous or ripple counting applications requiring low power dissipation and/or high noise
immunity.
Features
High Speed Operation
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
CC = 2 to 6 V
Low Input Current: 1 A max
Low Quiescent Supply Current: I
CC (static) = 4 A max (Ta = 25°C)
Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74HC4518P
HD74HC4520P
PRDP0016AE-B
(DP-16FV)
P
HD74HC4518FPEL
HD74HC4520FPEL
SOP-16 pin (JEITA)
PRSP0016DH-B
(FP-16DAV)
FP
EL (2,000 pcs/reel)
HD74HC4520RPEL
SOP-16 pin (JEDEC)
PRSP0016DG-A
(FP-16DNV)
RP
EL (2,000 pcs/reel)
Note:
Please consult the sales office for the above package availability.
Function Table
Clock
Enable
Reset
Operation
H
L
Increment counter
L
Increment counter
X
L
No change
X
L
No change
L
No change
H
L
No change
X
H
Q0 to Q3 = L
Notes: 1. X: Don’t care
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相關(guān)代理商/技術(shù)參數(shù)
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