Rev. 2.0, 09/02, page
x
of
xviii
6.5
6.6
Drawing Using Linear Format Source ..........................................................................272
SDRAM Mode Register Values for UGM Set by Q2SD ...............................................273
Section 7 Electrical Characteristics................................................................ 275
7.1
Absolute Maximum Ratings.........................................................................................275
7.2
Recommended Operating Conditions ...........................................................................275
7.3
Electrical Characteristics Test Methods........................................................................276
7.3.1
Timing Testing................................................................................................276
7.3.2
Test Load Circuit (All Output and Input/Output Pins) ......................................277
7.4
Electrical Characteristics..............................................................................................278
7.4.1
DC Characteristics...........................................................................................278
7.4.2
AC Characteristics...........................................................................................280
7.5
Timing Charts..............................................................................................................288
7.5.1
Clocks.............................................................................................................288
7.5.2
Reset Timing...................................................................................................288
7.5.3
CPU Read Cycle Timing .................................................................................289
7.5.4
CPU Write Cycle Timing.................................................................................290
7.5.5
DMA Write Cycle Timing (DMAC
→
Q2SD).................................................291
7.5.6
Interrupt Output Timing...................................................................................295
7.5.7
UGM Read Cycle Timing................................................................................296
7.5.8
UGM Write Cycle Timing...............................................................................297
7.5.9
UGM Refresh Cycle Timing and Mode Register Setting Timing ......................298
7.5.10 Master Mode Display Timing..........................................................................300
7.5.11 TV Sync Mode Display Timing.......................................................................301
7.5.12 Video Interface Timing....................................................................................303
Appendix A Initial Register Values................................................................ 305
Appendix B Commands and Parameters........................................................ 306
B.1
Relationship between Commands and Rendering Attributes..........................................306
B.2
Command Codes..........................................................................................................307
B.3
Command Parameter Specifications .............................................................................308
Appendix C Drawing Algorithms .................................................................. 316
Appendix D Package Dimensions.................................................................. 319
Appendix E Display Operating Clock and Screen Synthesis .......................... 320
Appendix F Example of System Configuration for SuperH............................ 325
F.1
Determination of Clock................................................................................................326
F.2
Setting of Software Weight..........................................................................................327
F.3
Special Notes on Connection........................................................................................328