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Section 3 MCU Operating Modes and Address Space.............................................. 63
3.1
Overview............................................................................................................................ 63
3.1.1
Mode Selection .....................................................................................................
63
3.1.2
Mode and System Control Registers .................................................................... 63
3.2
System Control Register (SYSCR).................................................................................... 64
3.3
Mode Control Register (MDCR) .......................................................................................
66
3.4
Address Space Map in Each Operating Mode ...................................................................
66
Section 4 Exception Handling .......................................................................................... 71
4.1
Overview............................................................................................................................ 71
4.2
Reset...................................................................................................................................
71
4.2.1
Overview...............................................................................................................
71
4.2.2
Reset Sequence .....................................................................................................
71
4.2.3
Disabling of Interrupts after Reset........................................................................ 74
4.3
Interrupts ............................................................................................................................ 74
4.3.1
Overview...............................................................................................................
74
4.3.2
Interrupt-Related Registers ...................................................................................
76
4.3.3
External Interrupts ................................................................................................ 80
4.3.4
Internal Interrupts.................................................................................................. 80
4.3.5
Interrupt Handling ................................................................................................ 81
4.3.6
Interrupt Response Time.......................................................................................
86
4.3.7
Precaution .............................................................................................................
86
4.4
Note on Stack Handling .....................................................................................................
87
Section 5 Wait-State Controller ....................................................................................... 89
5.1
Overview............................................................................................................................ 89
5.1.1
Features .................................................................................................................
89
5.1.2
Block Diagram...................................................................................................... 89
5.1.3
Input/Output Pins.................................................................................................. 90
5.1.4
Register Configuration.......................................................................................... 90
5.2
Register Description...........................................................................................................
90
5.2.1
Wait-State Control Register (WSCR)...................................................................
90
5.3
Wait Modes........................................................................................................................ 92
Section 6 Clock Pulse Generator ..................................................................................... 95
6.1
Overview............................................................................................................................ 95
6.1.1
Block Diagram...................................................................................................... 95
6.1.2
Wait-State Control Register (WSCR)...................................................................
96
6.2
Oscillator Circuit................................................................................................................ 97
6.2.1
Oscillator (Generic Device) .................................................................................. 97
6.2.2
Oscillator Circuit (H8/3337SF) ............................................................................ 101
6.3
Duty Adjustment Circuit.................................................................................................... 105
6.4
Prescaler ............................................................................................................................. 105