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No program runaway
When V
PP is applied, program execution must be supervised, e.g. by the watchdog timer.
These power-on and power-off timing requirements should also be satisfied in the event of a
power failure and in recovery from a power failure. If these requirements are not satisfied,
overprogramming or overerasing may occur due to program runaway etc., which could cause
memory cells to malfunction.
The V
PP flag is set and cleared by a threshold decision on the voltage applied to the FVPP pin.
The threshold level is between approximately V
CC + 2 V to 11.4 V.
When this flag is set, it becomes possible to write to the flash memory control register
(FLMCR) and the erase block registers (EBR1 and EBR2), even though the V
PP voltage may
not yet have reached the programming voltage range of 12.0 ± 0.6 V.
Do not actually program or erase the flash memory until V
PP has reached the programming
voltage range.
The programming voltage range for programming and erasing flash memory is 12.0 ± 0.6 V
(11.4 V to 12.6 V). Programming and erasing cannot be performed correctly outside this range.
When not programming or erasing the flash memory, ensure that the V
PP voltage does not
exceed the V
CC voltage. This will prevent unintended programming and erasing.
In this chip, the same pin is used for STBY and FV
PP. When this pin is driven low, a transition
is made to hardware standby mode. This happens not only in the normal operating modes
(modes 1, 2, and 3), but also when programming the flash memory with a PROM programmer.
When programming with a PROM programmer, therefore, use a programmer which sets this
pin to the V
CC level when not programming (FVPP=12 V).
Notes: *1 Here, V
PP application, release, and cutoff are defined as follows:
Application:
Raising the voltage from V
CC to 12±0.6 V.
Release:
Dropping the voltage from 12±0.6 V to V
CC.
Cutoff:
Halting voltage application (setting the floating state).
*2 In the LH version, V
CC = 3.0 V to 5.5 V.