
15
Pin No.
Expanded Modes
Single-Chip Mode
Flash
Mode 3
EPROM Memory
FP-80A,
TFP-80C
CP-84,
CG-84
Mode 1
Mode 2
HIF
Disabled
HIF
Enabled
Writer
Mode
Writer
Mode
69
83
D
4
D
4
P3
4
HDB
4
EO
4
FO
4
70
84
D
5
D
5
P3
5
HDB
5
EO
5
FO
5
71
1
D
6
D
6
P3
6
HDB
6
EO
6
FO
6
—2V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
72
3
D
7
D
7
P3
7
HDB
7
EO
7
FO
7
73
4
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
74
5
P8
0/HA0*
P8
0/HA0*
P8
0
HA
0
NC
75
6
P8
1/GA 20*
P8
1/GA 20*
P8
1
P8
1/GA 20
NC
76
7
P8
2/CS1*
P8
2/CS1*
P8
2
CS
1
NC
77
8
P8
3/ IOR*
P8
3/ IOR*
P8
3
IOR
NC
78
9
P8
4/ IRQ3/TxD1 when HIF is disabled or STAC bit is 1 in
STCR;
IOW/IRQ
3 when HIF is enabled and STAC bit is 0
NC
79
10
P8
5/ IRQ4/RxD1 when HIF is disabled or STAC bit is 1 in
STCR;
CS
2/ IRQ4 when HIF is enabled and STAC bit is 0
NC
80
11
P8
6/SCK1/
IRQ
5/SCL
P8
6/SCK1/
IRQ
5/SCL
P8
6/SCK1/
IRQ
5/SCL
P8
6/SCK1/
IRQ
5/SCL
NC
Notes: 1. Pins marked NC should be left unconnected.
2. For details on witer mode, refer to 18.2, Writer Mode, 19.6 Flash Memory Writer Mode
(H8/3334YF), 20.6 Flash Memory Writer Mode (H8/3337YF) and 21.5, Flash Memory
Writer Mode (H8/3337SF).
3. In this chip, except for the S-mask model (single-power-supply specification), the same
pin is used for STBY and FV
PP. When this pin is driven low, a transition is made to
hardware standby mode. This happens not only in the normal operating modes (modes
1, 2, and 3), but also when programming the flash memory with a PROM writer. When
using a PROM programmer to program dual-power-supply flash memory, therefore, the
PROM programmer specifications should provide for this pin to be held at the V
CC level
except when programming (FV
PP = 12 V).
*
Differs as in mode 3, depending on whether the host interface is enabled or disabled.