518
Set SWE bit in FLMCR1
Wait (x)
μ
s
n = 1
m = 0
Write 32-byte data in RAM reprogram data
area consecutively to flash memory
Enable WDT
Set PSU bit in FLMCR2
Wait (y)
μ
s
Set P bit in FLMCR1
Wait (z)
μ
s
Start of programming
Clear P bit in FLMCR1
Wait (
α
)
μ
s
Wait (
β
)
μ
s
NG
NG
NG
NG
OK
OK
OK
Wait (
γ
)
μ
s
Wait (
ε
)
μ
s
*
5
*
3
*
4
*
2
*
5
*
5
*
5
*
5
*
5
*
5
*
5
Store 32-byte program data in program
data area and reprogram data area
*
4
*
1
*
5
Wait (
η
)
μ
s
Clear PSU bit in FLMCR2
Disable WDT
Set PV bit in FLMCR1
H'FF dummy write to verify address
Read verify data
Reprogram data computation
Clear PV bit in FLMCR1
Clear SWE bit in FLMCR1
End of programming
m = 1
End of programming
Program data =
verify data
End of 32-byte
data verification
m = 0
Increment address
Programming failure
OK
Clear SWE bit in FLMCR1
n
≥
N
n
←
n + 1
Notes:
*
1
Data transfer is performed by byte transfer. The lower
8 bits of the first address written to must be H'00, H'20, H'40,
H'60, H'80, H'A0, H'C0, or H'E0. A 32-byte data transfer
must be performed even if writing fewer than 32 bytes;
in this case, H'FF data must be written to the extra addresses.
*
2
Verify data is read in 16-bit (word) units.
*
3
If a bit for which programming has been completed in the 32-byte
programming loop fails the following verify phase, additional
programming is performed for that bit.
*
4
An area for storing program data (32 bytes) and reprogram data
(32 bytes) must be provided in RAM. The contents of the latter
are rewritten as programming progresses.
*
5
See section 23, Flash Memory Characteristics, for the values of
x, y, z,
α
,
β
,
γ
,
ε
,
η
, and N.
Start
Program
Data
0
Reprogram
Data
1
Comments
Reprogramming is not
performed if program data
and verify data match
Programming incomplete;
reprogram
—
Still in erased state;
no action
RAM
Program data storage
area (32 bytes)
Reprogram data storage
area (32 bytes)
Transfer reprogram data to reprogram
data area
Verify
Data
0
0
1
1
1
0
1
0
1
1
Perform programming in the erased state.
Do not perform additional programming
on previously programmed addresses.
Figure 21.12 Program/Program-Verify Flowchart