455
Sample Program for Programming One Byte:
This program uses the following registers.
R0H: Specifies blocks to be erased.
R1H: Stores data to be programmed.
R1L: Stores data to be read.
R3:
Stores address to be programmed. Valid address specifications are H'0000 to H'EF7F in
mode 2, and H'0000 to H'F77F in mode 3.
R4:
Sets program and program-verify timing loop counters, and also stores register setting
value.
R5:
Sets program timing loop counter.
R6L: Used for program-verify fail count.
Arbitrary data can be programmed at an arbitrary address by setting the address in R3 and the data
in R1H.
The setting of #a and #b values depends on the clock frequency. Set #a and #b values according to
tables 20.9 (1) and (2).
FLMCR: .EQU H'FF80
EBR1: .EQU H'FF82
EBR2: .EQU H'FF83
TCSR: .EQU H'FFA8
.ALIGN 2
PRGM: MOV.B #H'**, R0H
MOV.B R0H, @EBR*:8
;
; Set EBR
*
MOV.B #H'00, R6L
MOV.W #H'a, R5
MOV.B R1H, @R3
PRGMS: INC R6L
MOV.W #H'A579, R4
MOV.W R4, @TCSR
MOV.W R5, R4
BSET #0, @FLMCR:8
LOOP1: SUBS #1, R4
MOV.W R4, R4
BNE LOOP1
BCLR #0, @FLMCR:8
MOV.W #H'A500, R4
MOV.W R4, @TCSR
; Program-verify fail counter
; Set program loop counter
; Dummy write
; Program-verify fail counter + 1
→
R6L
;
; Start watchdog timer
; Set program loop counter
; Set P bit
;
;
; Wait loop
; Clear P bit
;
; Stop watchdog timer
MOV.B #H'b , R4H
BSET #2, @FLMCR:8
LOOP2: DEC R4H
BNE LOOP2
MOV.B @R3, R1L
CMP.B R1H, R1L
BEQ PVOK
BCLR #2, @FLMCR:8
; Set program-verify loop counter
; Set PV bit
;
; Wait loop
; Read programmed address
; Compare programmed data with read data
; Program-verify decision
; Clear PV bit