431
(11) Cautions on Accessing Flash Memory Control Registers
1. Flash memory control register access state in each operating mode
The H8/3334YF has flash memory control registers located at addresses H'FF80 (FLMCR),
H'FF82 (EBR1), and H'FF83 (EBR2). These registers can only be accessed when 12 V is
applied to the flash memory program power supply pin, FV
PP
.
Table 19.17 shows the area accessed for the above addresses in each mode, when 12 V is and
is not applied to FV
PP
.
Table 19.17
Area Accessed in Each Mode with 12V Applied and Not Applied to FV
PP
Mode 1
Mode 2
Mode 3
12 V applied to FV
PP
register
Reserved area
(always H'FF)
Flash memory control
register (initial value H'80)
Flash memory control
(initial value H'80)
12 V not applied to
FV
PP
External address
space
External address space
Reserved area (always
H'FF)
2. When a flash memory control register is accessed in mode 2 (expanded mode with on-chip
ROM enabled)
When a flash memory control register is accessed in mode 2, it can be read or written to if
12 V is being applied to FV
PP
, but if not, external address space will be accessed. It is therefore
essential to confirm that 12 V is being applied to the FV
PP
pin before accessing these registers.
3. To check for 12 V application/non-application in mode 3 (single-chip mode)
When address H'FF80 is accessed in mode 3, if 12 V is being applied to FV
PP
, FLMCR is
read/written to, and its initial value after reset is H'80. When 12 V is not being applied to FV
PP
,
FLMCR is a reserved area that cannot be modified and always reads H'FF. Since bit 7
(corresponding to the V
PP
bit) is set to 1 at this time regardless of whether 12 V is applied to
FV
PP
, application or release of 12 V to FV
PP
cannot be determined simply from the 0 or 1 status
of this bit. A byte data comparison is necessary to check whether 12 V is being applied. The
relevant coding is shown below.
.
.
.
LABEL1: MOV.B @H'FF80, R1L
CMP.B #H'FF, R1L
BEQ LABEL1
.
.
.
Sample program for detection of 12 V application to FV
PP
(mode 3)