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參數(shù)資料
| 型號(hào)： | HD4074849TF |
| 廠商： | Hitachi,Ltd. |
| 元件分類： | 其它接口 |
| 英文描述： | TERMINAL |
| 中文描述： | IGBT模塊 |
| 文件頁數(shù)： | 96/125頁 |
| 文件大小： | 471K |
| 代理商： | HD4074849TF |
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HD404849 Series
96
Bit
Initial value
Read/Write
Bit name
3
0
R/W
RAME
2
0
R/W
IAOF
0
0
R/W
ICSF
1
0
R/W
ICEF
A/D current off flag (IAOF: $021, bit 2)
1
0
Refer to description of operating modes
RAME
Refer to description of timers
ICEF
Refer to description of timers
ICSF
IAOF (A/D current off flag)
Current I is cut off.
Current I flows.
Figure 83 A/D Current Off Flag (IAOF)
Note on Use:
Use the SEM and SEMD instructions to write data to the A/D start flag (ADSF: $020, bit 2),
but make sure that the A/D start flag is not written to during A/D conversion. Data read from the A/D data
register (ADRL: $017, ADRU: $018) during A/D conversion cannot be guaranteed.
The A/D converter does not operate in the stop, watch, and subactive modes because it relies on the clock
from OSC, which is stopped in these modes. During these low-power dissipation modes, current through
the resistor ladder is cut off to decrease the power input.
The port data register (PDR) is initialized to 1 by an MCU reset. At this time, if pull-up MOS is selected as
active by bit 3 of the miscellaneous register (MIS3), the port will be pulled up to V
CC
. When using a shared
R port/analog input pin as an input pin, clear PDR to 0. Otherwise, if pull-up MOS is selected by MIS3 and
PDR is set to 1, a pin selected by bit 1 of the A/D mode register as an analog pin will remain pulled up.
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