參數(shù)資料
型號: HD4074629
廠商: Hitachi,Ltd.
英文描述: AS Microcomputer Incorporating a DTMF Generator Circuit(微計(jì)算機(jī)帶雙音多頻發(fā)生器電路)
中文描述: 由于微機(jī)安裝有雙音多頻發(fā)電機(jī)斷路器(微計(jì)算機(jī)帶雙音多頻發(fā)生器電路)
文件頁數(shù): 76/155頁
文件大?。?/td> 549K
代理商: HD4074629
HD404629R Series
76
2
3
4
4
EVND
Input capture
status flag
(ICSF)
Input capture
error flag
(ICEF)
Timer D interrupt
request flag
(IFTD)
Error control
logic
Read signal
Edge detection
logic
System
clock
P
S
Timer read register D
(TRDL)
Timer counter D
(TCDL)
(TRDU)
(TCDU)
Input capture
timer control
Overflow
I
Timer mode
register D2
(TMD2)
Data bus
Clock line
Signal line
Edge
detection
control
Edge detection
selection register
2 (ESR2)
Time mode
register D1
(TMD1)
÷
2
÷
4
÷
8
÷
32
÷
128
÷
512
÷
2048
PER
Figure 62 Block Diagram of Timer D (Input Capture Timer)
Registers for Timer D Operation:
By using the following registers, timer D operation modes are selected
and the timer D count is read and written.
Timer mode register D1 (TMD1: $010)
Timer mode register D2 (TMD2: $015)
Timer write register D (TWDL: $011, TWDU: $012)
Timer read register D (TRDL: $011, TRDU: $012)
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HD404629R AS Microcomputer Incorporating a DTMF Generator Circuit(微計(jì)算機(jī)帶雙音多頻發(fā)生器電路)
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