參數(shù)資料
型號(hào)： HD404618FS
廠商： Hitachi,Ltd.
英文描述： 4-Bit Single-Chip Microcomputer
中文描述： 4位單片機(jī)
文件頁(yè)數(shù)： 21/89頁(yè)
文件大小： 358K
代理商： HD404618FS
HD404618 Series
21
Interrupt Enable Flag (IE: $000, Bit 0):
Controls the entire interrupt process. It is reset by the interrupt
processing and set by the RTNI instruction, as shown in table 4.
Table 4 Interrupt Enable Flag
IE
Interrupt Enabled/Disabled
0
Disabled
1
Enabled
External Interrupts (
INT
0
,
INT
1
):
Specified by port mode register A (PMRA: $004).
The
INT
1
input can be used as a clock signal input to timer B. Timer B increments at each falling edge of
the
INT
1
input. When using
INT
1
as a timer B external event input, external interrupt mask IM1 must be
set to prevent the
INT
1
interrupt request from being accepted (see table 6).
To detect the edge of
INT
0
or
INT
1
, more than two instruction cycle times are required (2t
cyc
or 2t
subcyc
).
External Interrupt Request Flags (IF0: $000, Bit 2; IF1: $001, Bit 0):
Set at the falling edge of the
INT
0
and
INT
1
inputs as shown in table 5.
Table 5 External Interrupt Request Flags
IF0, IF1
Interrupt Request
0
No
1
Yes
External Interrupt Masks (IM0: $000, Bit 3; IM1: $001, Bit 1):
Prevent (mask) interrupt requests
caused by the corresponding external interrupt request flags, as shown in table 6.
Table 6 External Interrupt Masks
IM0, IM1
Interrupt Request
0
Enabled
1
Disabled (masked)
Timer A Interrupt Request Flag (IFTA: $001, Bit 2):
Set by overflow output from timer A as shown in
table 7.
Table 7 Timer A Interrupt Request Flag
IFTA
Interrupt Request
0
No
1
Yes
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HD404618H 4-Bit Single-Chip Microcomputer
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HD404618H 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4-Bit Single-Chip Microcomputer
HD404618SERIES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
HD404618TF 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4-Bit Single-Chip Microcomputer
HD4046212FS 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4-Bit Microcontroller
HD4046212H 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4-Bit Microcontroller
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