參數(shù)資料
型號(hào)： HC05J5GRS
英文描述： 68HC05J5 General Release Specification
中文描述： 68HC05J5一般版本規(guī)范
文件頁(yè)數(shù)： 3/106頁(yè)
文件大?。?/td> 1366K
代理商： HC05J5GRS
July 16, 1999
GENERAL RELEASE SPECIFICATION
MC68HC05J5A
REV 2.1
MOTOROLA
i
TABLE OF CONTENTS
Section
Page
SECTION 1
GENERAL DESCRIPTION
1.1
1.2
1.3
1.4
1.5
1.5.1
1.5.2
1.5.3
1.5.4
1.5.5
1.5.6
FEATURES......................................................................................................1-1
MASK OPTIONS..............................................................................................1-2
MCU STRUCTURE..........................................................................................1-2
PIN ASSIGNMENTS........................................................................................1-4
FUNCTIONAL PIN DESCRIPTION..................................................................1-4
V
DD
AND V
SS
..............................................................................................1-4
OSC1, OSC2/R............................................................................................1-4
RESET.........................................................................................................1-6
IRQ (MASKABLE INTERRUPT REQUEST)................................................1-6
PA0-PA7......................................................................................................1-6
PB0-PB5......................................................................................................1-7
SECTION 2
MEMORY
I/O AND CONTROL REGISTERS ...................................................................2-2
RAM.................................................................................................................2-2
ROM.................................................................................................................2-2
I/O REGISTERS SUMMARY...........................................................................2-3
SECTION 3
CENTRAL PROCESSING UNIT
REGISTERS ....................................................................................................3-1
ACCUMULATOR (A)........................................................................................3-2
INDEX REGISTER (X).....................................................................................3-2
STACK POINTER (SP)....................................................................................3-2
PROGRAM COUNTER (PC) ...........................................................................3-2
CONDITION CODE REGISTER (CCR)...........................................................3-3
Half Carry Bit (H-Bit)....................................................................................3-3
Interrupt Mask (I-Bit)....................................................................................3-3
Negative Bit (N-Bit)......................................................................................3-3
Zero Bit (Z-Bit).............................................................................................3-3
Carry/Borrow Bit (C-Bit)...............................................................................3-4
SECTION 4
INTERRUPTS
CPU INTERRUPT PROCESSING...................................................................4-1
RESET INTERRUPT SEQUENCE ..................................................................4-2
SOFTWARE INTERRUPT (SWI).....................................................................4-3
HARDWARE INTERRUPTS............................................................................4-3
EXTERNAL INTERRUPT (IRQ).......................................................................4-3
IRQ CONTROL/STATUS REGISTER (ICSR) $0A......................................4-5
2.1
2.2
2.3
2.4
3.1
3.2
3.3
3.4
3.5
3.6
3.6.1
3.6.2
3.6.3
3.6.4
3.6.5
4.1
4.2
4.3
4.4
4.5
4.5.1
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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