參數(shù)資料
型號(hào): GS880Z32CGT-250
廠商: GSI TECHNOLOGY
元件分類: SRAM
英文描述: 256K X 32 ZBT SRAM, 5.5 ns, PQFP100
封裝: TQFP-100
文件頁數(shù): 20/24頁
文件大?。?/td> 885K
代理商: GS880Z32CGT-250
100-Pin TQFP Pin Descriptions
Symbol
Type
Description
A0, A1
In
Burst Address Inputs; Preload the burst counter
A
In
Address Inputs
CK
In
Clock Input Signal
BA
In
Byte Write signal for data inputs DQA; active low
BB
In
Byte Write signal for data inputs DQB; active low
BC
In
Byte Write signal for data inputs DQC; active low
BD
In
Byte Write signal for data inputs DQD; active low
W
In
Write Enable; active low
E1
In
Chip Enable; active low
E2
In
Chip Enable; Active High. For self decoded depth expansion
E3
In
Chip Enable; Active Low. For self decoded depth expansion
G
In
Output Enable; active low
ADV
In
Advance/Load; Burst address counter control pin
CKE
In
Clock Input Buffer Enable; active low
NC
No Connect
DQA
I/O
Byte A Data Input and Output pins
DQB
I/O
Byte B Data Input and Output pins
DQC
I/O
Byte C Data Input and Output pins
DQD
I/O
Byte D Data Input and Output pins
DQPA
I/O
9th Data I/O Pin; Byte A
DQPB
I/O
9th Data I/O Pin; Byte B
DQPC
I/O
9th Data I/O Pin; Byte C
DQPD
I/O
9th Data I/O Pin; Byte D
ZZ
In
Power down control; active high
FT
In
Pipeline/Flow Through Mode Control; active low
LBO
In
Linear Burst Order; active low
VDD
In
Core power supply
VSS
In
Ground
VDDQ
In
Output driver power supply
GS880Z18/32/36CT-333/300/250/200/150
Rev: 1.02 12/2010
5/24
2010, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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