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參數(shù)資料
| 型號： | GS880E32 |
| 廠商： | GSI TECHNOLOGY |
| 英文描述： | 8Mb（256K x 32Bit) Synchronous Burst SRAM(8M位（256K x 32位）同步靜態(tài)RAM（帶2位脈沖地址計數(shù)器）) |
| 中文描述： | 8MB的（256 × 32位）同步突發(fā)靜態(tài)存儲器（800萬位（256K × 32位）同步靜態(tài)隨機存儲器（帶2位脈沖地址計數(shù)器）） |
| 文件頁數(shù)： | 25/25頁 |
| 文件大?。?/td> | 850K |
| 代理商： | GS880E32 |
Rev: 1.11 11/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
25/25
2000, Giga Semiconductor, Inc.
Preliminary
GS880E18/32/36T-11/11.5/100/80/66
Revision History
DS/DateRev. Code: Old;
New
Types of Changes
Format or Content
Page;Revisions;Reason
GS880E18/32/36T
Rev1.04h
5/1999;
1.05 9/1999I
Format/Typos
Last Page/Fixed “GSGS..” in Ordering Information Note.
Fromatted Pin Outs and Pin Description to new small caps.
Formatted Block diagrams to new small caps.
Formatted Timing Diagrams to new small caps.
Changed “Flow thru” to “Flow Through” in Timing Diagrams.
Package Diagram/Changed “Dimesion” to “Dimension”.
5/Fixed pin description table to match pinouts.
Pin Description/Changed chip enables to match pins.
Pin Description/Changed pin 80 from NC to Address Input.
Pin Description/Rearranged Address Inputs to match order of
Pinout
Package Diagram/Changed Dimension D Max from 20.1 to
22.1
Changed Flow Through Read-Write Cycle Timing Diagram for
accuracy.
Changed order of TQFP Address Inputs to match pinout.
Changed order of TQFP DATA Input and Output pins to
match pinout.
New GSI Logo.
Changed all speed bin information (headings, references,
tables, ordering info..) to reflect 150 - 80Mhz
Content
GS880E18/32/36T
1.05 11/
1999K
880E18/32/36T
1.06 1/
2000L
Content
GS880E18/32/36T1.06 1/
2000L;
GS880E18/32/36T1.07 3/
2000N;
Content
GS880E18/32/36T1.07 3/
2000N;
GS880E18/32/36T1.08 3/
2000O;
Content
Corrections to AC Electrical Characteristics Table -
GS880E18/32/36T1.08 3/
2000O;
880E183236_r1_09
Content/Format
Removed 150 MHz speed bin
Changed 133 MHz and 117 MHz speed bins to 11 ns and
11.5 ns (100 MHz) numbers
Updated format to comply with Technical Publications
standards
Updated Capitance table—removed Input row and changed
Output row to I/O
880E18_r1_09;
880E18_r1_10
Content
880E18_r1_10;
880E18_r1_11
Content
Corrected typo in AC Electrical Characteristics table
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS880F18 | 8Mb（512K x 18Bit) Synchronous Burst SRAM(8M位（512K x 18位）同步靜態(tài)RAM（帶2位脈沖地址計數(shù)器）) |
| GS880F36 | 8Mb（256K x 36Bit) Synchronous Burst SRAM(8M位（256K x 36位）同步靜態(tài)RAM（帶2位脈沖地址計數(shù)器）) |
| GS880Z18 | 8Mb Pipelined and Flow Through Synchronous NBT SRAM(8M位流水線式和流通型同步NBT靜態(tài)RAM) |
| GS880Z36 | 8Mb Pipelined and Flow Through Synchronous NBT SRAM(8M位流水線式和流通型同步NBT靜態(tài)RAM) |
| GS880Z36AT-133I | 9Mb Pipelined and Flow Through Synchronous NBT SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS880E32AT-133 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 9Mb Synchronous Burst SRAMs |
| GS880E32AT-133I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 9Mb Synchronous Burst SRAMs |
| GS880E32AT-150 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 9Mb Synchronous Burst SRAMs |
| GS880E32AT-150I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 9Mb Synchronous Burst SRAMs |
| GS880E32AT-166 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 9Mb Synchronous Burst SRAMs |
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