參數(shù)資料
型號(hào)： GS8662DT10BGD-400IT
廠商： GSI TECHNOLOGY
元件分類： SRAM
英文描述： 8M X 9 QDR SRAM, 0.45 ns, PBGA165
封裝： 13 X 15 MM, 1 MM PITCH, ROHS COMPLIANT, FPBGA-165
文件頁(yè)數(shù)： 7/29頁(yè)
文件大小： 963K
代理商： GS8662DT10BGD-400IT
GS8662DT07/10/19/37BD-450/400/350/333/300
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.00 5/2011
15/29
2011, GSI Technology
Programmable Impedance HSTL Output Driver DC Electrical Characteristics
Parameter
Symbol
Min.
Max.
Units
Notes
Output High Voltage
VOH1
VDDQ/2 – 0.12
VDDQ/2 + 0.12
V
1, 3
Output Low Voltage
VOL1
VDDQ/2 – 0.12
VDDQ/2 + 0.12
V
2, 3
Output High Voltage
VOH2
VDDQ – 0.2
VDDQ
V
4, 5
Output Low Voltage
VOL2
Vss
0.2
V
4, 6
Notes:
1.
IOH = (VDDQ/2) / (RQ/5) +/– 15% @ VOH = VDDQ/2 (for: 175Ω ≤ RQ ≤ 350Ω).
2.
IOL = (VDDQ/2) / (RQ/5) +/– 15% @ VOL = VDDQ/2 (for: 175Ω ≤ RQ ≤350Ω).
3. Parameter tested with RQ = 250
Ω and VDDQ = 1.5 V
4. 0
Ω ≤ RQ ≤ ∞Ω
5. IOH = –1.0 mA
6. IOL = 1.0 mA
Operating Currents
Parameter
Symbol
Test Conditions
-450
-400
-350
-333
-300
Notes
0°
to
70°C
–40
°
to
85°C
0°
to
70°C
–40°
to
85°C
0°
to
70°C
–40°
to
85°C
0°
to
70°C
–40°
to
85°C
0°
to
70°C
–40°
to
85°C
Operating
Current (x36):
DDR
IDD
VDD = Max, IOUT = 0 mA
Cycle Time
≥ tKHKH Min
1055
mA
1065
mA
940
mA
950
mA
885
mA
895
mA
810
mA
820
mA
735
mA
745
mA
2, 3
Operating
Current (x18):
DDR
IDD
VDD = Max, IOUT = 0 mA
Cycle Time
≥ tKHKH Min
820
mA
830
mA
735
mA
745
mA
695
mA
705
mA
630
mA
640
mA
580
mA
590
mA
2, 3
Operating
Current (x9):
DDR
IDD
VDD = Max, IOUT = 0 mA
Cycle Time
≥ tKHKH Min
820
mA
830
mA
735
mA
745
mA
695
mA
705
mA
630
mA
640
mA
580
mA
590
mA
2, 3
Operating
Current (x8):
DDR
IDD
VDD = Max, IOUT = 0 mA
Cycle Time
≥ tKHKH Min
820
mA
830
mA
735
mA
745
mA
695
mA
705
mA
630
mA
640
mA
580
mA
590
mA
2, 3
Standby Current
(NOP): DDR
ISB1
Device deselected,
IOUT = 0 mA, f = Max,
All Inputs
≤ 0.2 V
or
≥ VDD – 0.2 V
270
mA
280
mA
260
mA
270
mA
250
mA
260
mA
240
mA
250
mA
230
mA
240
mA
2, 4
Notes:
1. Power measured with output pins floating.
2. Minimum cycle, IOUT = 0 mA
3. Operating current is calculated with 50% read cycles and 50% write cycles.
4. Standby Current is only after all pending read and write burst operations are completed.
相關(guān)PDF資料
PDF描述
GS8662Q18BD-357 4M X 18 STANDARD SRAM, 0.45 ns, PBGA165
GS8662Q18BGD-357IT 4M X 18 STANDARD SRAM, 0.45 ns, PBGA165
GS8662Q18GE-167IT 4M X 18 STANDARD SRAM, 0.5 ns, PBGA165
GS8662R09BD-350 8M X 9 STANDARD SRAM, 0.45 ns, PBGA165
GS8662R09BGD-400I 8M X 9 STANDARD SRAM, 0.45 ns, PBGA165
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