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參數(shù)資料
| 型號： | GS84118AT-133IT |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | SRAM |
| 英文描述： | 256K X 18 CACHE TAG SRAM, 11 ns, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁數(shù)： | 17/20頁 |
| 文件大?。?/td> | 404K |
| 代理商： | GS84118AT-133IT |
GS84118AT/B-166/150/130/100
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.02 4/2005
6/20
2001, GSI Technology
Mode Pin Function
LBO
Function
L
Linear Burst
H or NC
Interleaved Burst
FT
Function
L
Flow Through
H or NC
Pipeline
Power Down Control
Note:
There are pull up devices on LBO and FT pins and pull down device on ZZ pin, so those input pins can be unconnected
and the chip will operate in the default states as specified in the above tables.
ZZ
Function
L or NC
Active
H
Standby, IDD = ISB
Linear Burst Sequence
A[1:0] A[1:0] A[1:0] A[1:0]
1st address
00
01
10
11
2nd address
01
10
11
00
3rd address
10
11
00
01
4th address
11
00
01
10
Interleaved Burst Sequence
A[1:0] A[1:0] A[1:0] A[1:0]
1st address
00
01
10
11
2nd address
01
00
11
10
3rd address
10
11
00
01
4th address
11
10
01
00
Note:
H = logic high, L = logic low, NC = no connect
Byte Write Function
Function
GW
BWE BW1
BW2
Read
H
X
Read
H
L
H
Write all bytes
L
X
Write all bytes
H
L
Write byte 1
H
L
H
Write byte 2
H
L
H
L
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS84118AT-150 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:256K x 18 Sync Cache Tag |
| GS84118AT-150I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:256K x 18 Sync Cache Tag |
| GS84118AT-166 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:256K x 18 Sync Cache Tag |
| GS84118AT-166I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:256K x 18 Sync Cache Tag |
| GS84118B-100 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:256K x 18 Sync Cache Tag |
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