- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄299161 > GS832236B-225 (GSI TECHNOLOGY) 1M X 36 CACHE SRAM, 7 ns, PBGA119 PDF資料下載
參數(shù)資料
| 型號(hào)： | GS832236B-225 |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | SRAM |
| 英文描述： | 1M X 36 CACHE SRAM, 7 ns, PBGA119 |
| 封裝： | 14 X 22 MM, 1.27 MM PITCH, FBGA-119 |
| 文件頁(yè)數(shù)： | 6/46頁(yè) |
| 文件大?。?/td> | 1592K |
| 代理商： | GS832236B-225 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)當(dāng)前第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)
GS832218(B/E)/GS832236(B/E)/GS832272(C)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.07a 12/2007
14/46
2001, GSI Technology
Synchronous Truth Table
Operation
Address
Used
State
Diagram
Key
E1
E2
E3
ADSP ADSC
ADV
W
DQ3
Deselect Cycle, Power Down
None
X
L
X
H
X
L
X
High-Z
Deselect Cycle, Power Down
None
X
L
X
L
X
High-Z
Deselect Cycle, Power Down
None
X
L
X
H
L
X
High-Z
Deselect Cycle, Power Down
None
X
L
X
L
X
High-Z
Deselect Cycle, Power Down
None
X
H
X
L
X
High-Z
Read Cycle, Begin Burst
External
R
L
H
L
X
Q
Read Cycle, Begin Burst
External
R
L
H
L
H
L
X
F
Q
Write Cycle, Begin Burst
External
W
L
H
L
H
L
X
T
D
Read Cycle, Continue Burst
Next
CR
X
H
L
F
Q
Read Cycle, Continue Burst
Next
CR
H
X
H
L
F
Q
Write Cycle, Continue Burst
Next
CW
X
H
L
T
D
Write Cycle, Continue Burst
Next
CW
H
X
H
L
T
D
Read Cycle, Suspend Burst
Current
X
H
F
Q
Read Cycle, Suspend Burst
Current
H
X
H
F
Q
Write Cycle, Suspend Burst
Current
X
H
T
D
Write Cycle, Suspend Burst
Current
H
X
H
T
D
Notes:
1. X = Don’t Care, H = High, L = Low
2. E = T (True) if E2 = 1 and E3 = 0; E = F (False) if E2 = 0 or E3 = 1
3. W = T (True) and F (False) is defined in the Byte Write Truth Table preceding.
4. G is an asynchronous input. G can be driven high at any time to disable active output drivers. G low can only enable active drivers (shown
as “Q” in the Truth Table above).
5. All input combinations shown above are tested and supported. Input combinations shown in gray boxes need not be used to accomplish
basic synchronous or synchronous burst operations and may be avoided for simplicity.
6. Tying ADSP high and ADSC low allows simple non-burst synchronous operations. See BOLD items above.
7. Tying ADSP high and ADV low while using ADSC to load new addresses allows simple burst operations. See ITALIC items above.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS832236E-225IV | 1M X 36 CACHE SRAM, 7 ns, PBGA165 |
| GS8322Z18E-225VT | 2M X 18 ZBT SRAM, 7 ns, PBGA165 |
| GS8322ZV72GC-150IT | 512K X 72 ZBT SRAM, 8.5 ns, PBGA209 |
| GS8322ZV36GB-200T | 1M X 36 ZBT SRAM, 7.5 ns, PBGA119 |
| GS8322ZV36GE-225IT | 1M X 36 ZBT SRAM, 7 ns, PBGA165 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS832236B-250 | 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 2.5V/3.3V 36MBIT 1MX36 6.5NS/2.5NS 119FBGA - Trays |
| GS832236E-150 | 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 2.5V/3.3V 36MBIT 1MX36 8.5NS/3.8NS 165FBGA - Trays |
| GS832236E-150I | 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 2.5V/3.3V 36MBIT 1MX36 8.5NS/3.8NS 165FBGA - Trays |
| GS832236E-150IT | 制造商:GSI Technology 功能描述:SRAM SYNC SGL 2.5V/3.3V 36MBIT 1MX36 8.5NS/3.8NS 165FBGA - Tape and Reel |
| GS832236E-150IV | 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V/2.5V 36MBIT 1MX36 8.5NS/3.8NS 165FPBGA - Trays |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。