參數(shù)資料
型號: GS8170S72
廠商: GSI TECHNOLOGY
英文描述: 16Mb(256K x 72Bit)Synchronous SRAM(16M位(256K x 72位)同步靜態(tài)RAM)
中文描述: 16Mb的(256 × 72Bit)同步SRAM(1,600位(256 × 72位)同步靜態(tài)內(nèi)存)
文件頁數(shù): 6/38頁
文件大小: 934K
代理商: GS8170S72
Rev: 1.01 11/2000
Specifications cited are design targets and are subject to change without notice. For latest documentation contact your GSI representative.
6/38
2000, Giga Semiconductor, Inc.
A
Advanced Information
GS8170S18/36/72B-333/300/275/250
Background
The central characteristics of the GSI
Σ
RAMs are that they are extremely fast and consume very little power. Because both
operating and interface power is low,
Σ
RAMs can be implemented in a wide (x72) configuration, providing very high single
package bandwidth (in excess of 20 Gb/s in ordinary pipelined configuration) and very low random access latency ( 5 ns). The use
of very low voltage circuits in the core and 1.8 V or 1.5 V interface voltages allow the speed, power and density performance of
Σ
RAMs.
Although the Sigma RAM family of pinouts has been designed to support a number of different common read and write protocol
options, not all Sigma RAM implementations will support all possible protocols. The following timing diagrams provide a quick
comparison between read and write protocols options available in the context of the Sigma RAM standard. This particular data
sheet covers the single data rate (non-DDR) Sigma RAM.
C5,D4, D5, D7, D8,K4,
K8, K9, T4, T5, T7,
T8,U3, U5, U7, U9
B5
C7
A1, A2, B1, B2, B4, B9,
C1, C2, C3, C8, D1, D2,
E1, E10, F10, F11, G10,
G11, H10, H11, J10,
J11, L1, L2, M1, M2, N1,
N2, P1, P2, R2, R11,
T10, T11, U10, U11,
V10, V11, W10, W11
A10, A11, B8, B10, B11,
C4, C10, C11, D10, D11,
E11, R1, T1, T2, U1, U2,
V1, V2, W1, W2
B6
E5, E6, E7, G5, G7, J5,
J7, L5, L7, N5, N7, R5,
R6, R7
E3, E4, E8, E9, J3, J4,
J8, J9, L3, L4, L8, L9,
N3, N4, N8, N9, R3, R4,
R8, R9
D3, D9, F3, F4, F5, F7,
F8, F9, H3, H4, H5, H7,
H8, H9, K5, K7, M3, M4,
M5, M7, M8, M9, P3, P4,
P5, P7, P8, P9, T3, T9
F6
NC
No Connect
Not connected to die (all versions)
NC
NC
No Connect
No Connect
Not connected to die (x72 version)
Not connected to die (x72/x36 versions)
NC
No Connect
Not connected to die (x36/x18 versions)
NC
No Connect
Not connected to die (x18 version)
W
Write
Input
Active Low
V
DD
Core Power Supply
Input
1.8 V Nominal
V
DDQ
Output Driver Power Supply
Input
1.8 V or 1.5 V Nominal
V
SS
Ground
Input
ZQ
Output Impedance Control
Input
Pin Description Table
Pin Location
Symbol
Description
Type
Comments
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