參數(shù)資料
型號(hào)： GMZAN3
廠商： Electronic Theatre Controls, Inc.
英文描述： XGA ALALOG INTERFACE LCD MONITOR CONTROLLER
中文描述： ALALOG的XGA液晶顯示器接口控制器
文件頁(yè)數(shù)： 29/53頁(yè)
文件大?。?/td> 556K
代理商： GMZAN3
gmZAN3 Preliminary Data Sheet
C0523-DAT-01G
35
July 2003
Ge nes i s Microc hip Confid e n tia l
http:// w ww . g enesis-mic r ochip.com
4.6 High-Quality Scaling
The gmZAN3 zoom scaler uses an adaptive scaling technique proprietary to Genesis Microchip Inc., and
provides high quality scaling of real time video and graphics images. An input field/frame is scalable in
both the vertical and horizontal dimensions.
Interlaced fields may be spatially de-interlaced by vertically scaling and repositioning the input fields to
align with the output display’s pixel map.
4.6.1 Variable Zoom Scaling
The gmZAN3 scaling filter incorporates programmable scaling coefficients. This is useful for improving
the sharpness and definition of graphics when scaling at high zoom factors (such as VGA to XGA).
4.6.2 Horizontal & Vertical Shrink
The gmZAN3 provides an arbitrary vertical shrink down to (50% + 1 pixel/line) of the original image
size. The integrated ADC performs the horizontal shrink. This allows the gmZAN3 to capture and
display images one VESA standard format larger than the native display resolution. For example, SXGA
may be captured and displayed on an XGA panel.
4.7 Gamma LUT
The gmZAN3 provides an 8 to 10-bit look-up table (LUT) for each input color channel intended for
Gamma correction and to compensate for a non-linear response of the LCD panel. A 10-bit output results
in an improved color depth control. The 10-bit output is then dithered down to 8 bits (or 6 bits) per
channel at the display (see section 4.8.3 below). The LUT is user programmable to provide an arbitrary
transfer function. Gamma correction occurs after the zoom / shrink scaling block.
The LUT has bypass enable. If bypassed, the LUT does not require programming.
4.8 Display Output Interface
The Display Output Port provides data and control signals that permit the gmZAN3 to connect to a
variety of flat panel devices. The output interface is configurable for 18 or 24-bit RGB pixels, either
single or double (TTL only) pixel wide. All display data and timing signals are synchronous with the
DCLK output clock.
4.8.1 Display Synchronization
Refer to section 4.1 for information regarding internal clock synthesis.
The gmZAN3 support the following display synchronization modes:
Frame Sync Mode: The display frame rate is synchronized to the input frame or field rate. This mode
is used for standard operation.
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