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| 型號(hào)： | GMS90L320 |
| 英文描述： | 8-Bit Single-Chip Microcontrollers(低電壓,8位單片微控制器) |
| 中文描述： | 8位單芯片微控制器（低電壓，8位單片微控制器） |
| 文件頁(yè)數(shù)： | 24/46頁(yè) |
| 文件大?。?/td> | 683K |
| 代理商： | GMS90L320 |
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GMS90C320
20
OCT. 2000 Ver 1.2
Power Saving Modes
Two power down modes are available, the Idle Mode and Power Down Mode.
ThebitsPDEandIDLEoftheregisterPCONselectthePowerDownmodeortheIdlemode,respectively.IfthePowerDown
mode andtheIdlemodearesetat the same time, the Power Down modetakes precedence.
Table10
givesa generaloverview
of the power saving modes.
In the Power Down mode of operation, V
CC
can be reduced to minimize power consumption. It must be ensured, however,
that V
CC
is not reduced before the Power Down mode is invoked, and that V
CC
is restored to its normal operating level, before
the Power Down mode is terminated. The reset signal that terminates the Power Down Mode also restarts the oscillator. The
reset should not be activated before V
CC
is restored to its normal operating level and must be held active long enough to allow
the oscillator to restart and stabilize (similar to power-on reset).
Table 10
Power Saving Modes Overview
Mode
Entering Instruction
Example
Leaving by
Remarks
Idle mode
ORL PCON,#01H
- enabled interrupt
- Hardware Reset
CPU is gated off
CPU status registers maintain
their data.
Peripherals are active
Power-Down
Mode
ORL PCON,#02H
Hardware Reset
Oscillator is stopped, contents of
on-chip RAM and SFR’s are main-
tained (leaving Power Down Mode
means redefinition of SFR con-
tents).
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