參數(shù)資料
型號: GMS81C2012K
廠商: HYNIX SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: HYUNDAI MICRO ELECTRONICS 8-BIT SINGLE-CHIP MICROCONTROLLERS
中文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP64
封裝: SDIP-64
文件頁數(shù): 87/93頁
文件大?。?/td> 853K
代理商: GMS81C2012K
GMS81C1404/GMS81C1408
June. 2001 Ver 1.2
v
3. 16-BIT OPERATION
4. BIT MANIPULATION
NO.
MNEMONIC
OP
CODE
BYTE
NO
CYCLE
NO
OPERATION
FLAG
NVGBHIZC
1
ADDW dp
1D
2
5
16-Bits add without carry
YA
( YA ) + ( dp +1 ) ( dp )
NV--H-ZC
2
CMPW dp
5D
2
4
Compare YA contents with memory pair contents :
(YA)
(dp+1)(dp)
N-----ZC
3
DECW dp
BD
2
6
Decrement memory pair
( dp+1)( dp)
( dp+1) ( dp) - 1
N-----Z-
4
INCW dp
9D
2
6
Increment memory pair
( dp+1) ( dp)
( dp+1) ( dp ) + 1
N-----Z-
5
LDYA dp
7D
2
5
Load YA
YA
( dp +1 ) ( dp )
N-----Z-
6
STYA dp
DD
2
5
Store YA
( dp +1 ) ( dp )
YA
--------
7
SUBW dp
3D
2
5
16-Bits substact without carry
YA
( YA ) - ( dp +1) ( dp)
NV--H-ZC
NO.
MNEMONIC
OP
CODE
8B
8B
0C
1C
y1
2B
20
40
80
AB
AB
CB
CB
4B
6B
6B
x1
0B
A0
C0
EB
BYTE
NO
3
3
2
3
2
2
1
1
1
3
3
3
3
3
3
3
2
2
1
1
3
CYCLE
NO
4
4
4
5
4
2
2
2
2
5
5
4
4
5
5
5
4
2
2
2
6
OPERATION
FLAG
NVGBHIZC
-------C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
AND1 M.bit
AND1B M.bit
BIT dp
BIT !abs
CLR1 dp.bit
CLRA1 A.bit
CLRC
CLRG
CLRV
EOR1 M.bit
EOR1B M.bit
LDC M.bit
LDCB M.bit
NOT1 M.bit
OR1 M.bit
OR1B M.bit
SET1 dp.bit
SETA1 A.bit
SETC
SETG
STC M.bit
Bit AND C-flag : C
( C )
( M .bit )
Bit AND C-flag and NOT : C
( C )
~( M .bit )
Bit test A with memory :
Z
( A )
( M ) , N
( M
7
) , V
( M
6
)
Clear bit : ( M.bit )
“0”
Clear A bit : ( A.bit )
“0”
Clear C-flag : C
“0”
Clear G-flag : G
“0”
Clear V-flag : V
“0”
Bit exclusive-OR C-flag : C
( C )
( M .bit )
Bit exclusive-OR C-flag and NOT : C
( C )
~(M .bit)
-------C
Load C-flag : C
( M .bit )
Load C-flag with NOT : C
~( M .bit )
Bit complement : ( M .bit )
~( M .bit )
Bit OR C-flag : C
( C )
( M .bit )
Bit OR C-flag and NOT : C
( C )
~( M .bit )
Set bit : ( M.bit )
“1”
Set A bit : ( A.bit )
“1”
Set C-flag : C
“1”
Set G-flag : G
“1”
Store C-flag : ( M .bit )
C
Test and clear bits with A :
A - ( M ) , ( M )
( M )
~( A )
Test and set bits with A :
A - ( M ) , ( M )
( M )
( A )
-------C
MM----Z-
--------
--------
-------0
--0-----
-0--0---
-------C
-------C
-------C
--------
-------C
-------C
--------
--------
-------1
--1-----
--------
22
TCLR1 !abs
5C
3
6
N-----Z-
23
TSET1 !abs
3C
3
6
N-----Z-
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