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參數(shù)資料
| 型號： | GMS81C2012K |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | HYUNDAI MICRO ELECTRONICS 8-BIT SINGLE-CHIP MICROCONTROLLERS |
| 中文描述： | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP64 |
| 封裝： | SDIP-64 |
| 文件頁數(shù)： | 53/93頁 |
| 文件大?。?/td> | 853K |
| 代理商： | GMS81C2012K |
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GMS81C1404/GMS81C1408
June. 2001 Ver 1.2
51
14. Serial Peripheral Interface
The Serial Peripheral Interface (SPI) module is a serial in-
terface useful for communicating with other peripheral of
microcontroller devices. These peripheral devices may be
serial EEPROMs, shift registers, display drivers, A/D con-
verters, etc.
Figure 14-1 SPI Registers and Block Diagram
External Clock
SCK[1:0]
MSB
LSB
SOUT
SIN
SCK
Polarity
SIOR
fxin
÷
4
fxin
÷
16
TMR2OV
SCK1
SCK0
SM1
SM0
SRDY
SM1
SM0
POL
Octal Counter
2
SPIF (Interrupt Request)
SRDY
Q
R
S
SIOST
From Control Circuit
To Control Circuit
SPI Mode Control Register
SIOM
ADDRESS : E0H
RESET VALUE : 00000001
POL
SRDY
SM1
SM0
SCK1
SCK0
SIOST
SIOSF
POL
Serial Clock Polarity Selection bit.
0 : Data Transmission at falling edge
(Received data latch at rising edge)
1 : Data Transmission at rising edge
(Received data latch at falling edge)
SCK[1:0]
Serial Clock Selection bits
00 : fxin
÷
4
01 : fxin
÷
16
10 : TMR2OV (Overflow of Timer 2)
11 : External Clock
SRDY
Serial Ready Enable bit
0 : Disable (RC3)
1 : Enable (SRDYIN / SRDYOUT)
SIOST
Serial Transmit Start bit
0 : Disable
1 : Start (After one SCK, becomes “0”)
SM[1:0]
Serial Operation Mode Selection bits
00 : Normal Port (RC4, RC5, RC6)
01 : Transmit Mode (SCK, RC5, SOUT)
10 : Receive Mode (SCK, SIN, RC6)
11 : Transmit & Receive Mode (SCK, SIN, SOUT)
SIOSF
Serial Transmit Status bit
0 : During Transmission
1 : Finished
SPI Data Register
SIOR
ADDRESS : E1H
RESET VALUE : Undefined
00
01
10
11
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