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參數(shù)資料
| 型號(hào)： | GLT41116 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 64k x 16 CMOS Dynamic RAM with Fast Page Mode |
| 中文描述： | 64k的× 16的CMOS動(dòng)態(tài)隨機(jī)存儲(chǔ)器的快速頁(yè)面模式 |
| 文件頁(yè)數(shù)： | 15/16頁(yè) |
| 文件大小： | 106K |
| 代理商： | GLT41116 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)當(dāng)前第15頁(yè)第16頁(yè)
8
G-LINK Technology
GLT41116
July 1998 (Rev. 1)
CLK
CKE
CE
R/Wn
Don’t Care
Figure 3. NOP, STALL and DESELECT Timing
ADV/LD
BWn
ADDRESS
D/Q
A1
A2
A3
A4
A5
12
34
56789
10
Q (A2)
D (A1)
Undefined
tKHQZ
tKHQX
WRITE D(A1)
READ Q(A2)
STALL
READ Q(A1)
WRITE D(A2)
STALL
NOP
READ Q(A3)
DESELECT
Continue
DESELECT
D (A5)
NOTE:
1. The IGNORE CLOCK EDGE or STALL cycle (clock 3) illustrates CKE being used to create a “pause.” A WRITE is not performed during this cycle.
2. For this waveform, ZZ and OE are tied LOW.
3. CE represents three signals. When CE = 0, it represents CE = 0, CE2 = 0, CE2 = 1.
4. Data coherency is provided for all possible operations. If a READ is initiated, the most current data is used. The most recent data may be from the input data register.
Q (A3)
D (A4)
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