參數(shù)資料
型號(hào)： FX980L6
廠商： CML MICROSYSTEMS PLC
元件分類(lèi)： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQCC44
封裝： PLASTIC, LCC-44
文件頁(yè)數(shù)： 25/86頁(yè)
文件大?。?/td> 821K
代理商： FX980L6
TETRA Baseband Processor
FX980
1997 Consumer Microcircuits Limited
31
D/980/3
AuxAdcCtrl
Title:
Auxiliary ADC data converter Control register
Address:
$0x0B
Function:
RW
Description:
This register controls the operation of the four ADC channels. These are implemented using a
single ADC converter which is multiplexed on to each of the ADC channels. A conversion cycle
consists of performing a conversion for each of the active channels in turn.
Bit
Name
Active State
Function
7
RW
Reserved. Set this bit Low. Undefined on read.
6
AdcConvertRate
High
RW
This bit changes the ADC conversion rate. If this bit is set
Low, the ADC is clocked by MCLK/8, yielding a conversion
time of 80x MCLK periods per ADC channel. The maximum
sample rate is lower than this. With a single channel
selected, the maximum rate is MCLK/112 samples/second.
Setting this bit high will halve the ADC clock rate, and hence
double the conversion time.
5
AdcContConv
High
RW
Continuous conversion mode control bit; when inactive, sets
the ADCs into one-shot conversion mode; when active, the
ADCs will continuously convert. One-shot conversion mode
is initiated by the StartConvert bit. In continuous convert
mode, the ADC will start a new conversion cycle on all active
channels after the previous cycle has completed.
4
EnableAdc4
High
RW
Setting this bit high will enable ADC channel 4 for
conversion. This bit may be updated at any time, but will
only change the active state of the ADC channel for the next
time it is converted.
3
EnableAdc3
High
RW
Setting this bit high will enable ADC channel 3 for
conversion. This bit may be updated at any time, but will
only change the active state of the ADC channel for the next
time it is converted.
2
EnableAdc2
High
RW
Setting this bit high will enable ADC channel 2 for
conversion. This bit may be updated at any time, but will
only change the active state of the ADC channel for the next
time it is converted.
1
EnableAdc1
High
RW
Setting this bit high will enable ADC channel 1 for
conversion. This bit may be updated at any time, but will
only change the active state of the ADC channel for the next
time it is converted.
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