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參數(shù)資料
| 型號： | FW804 |
| 英文描述： | PHY IEEE 1394A Four-Cable Transceiver/Arbiter Device |
| 中文描述： | PHY的IEEE 1394A端口四線收發(fā)器/仲裁器裝置 |
| 文件頁數(shù)： | 9/24頁 |
| 文件大小： | 398K |
| 代理商： | FW804 |
Agere Systems Inc.
9
Data Sheet, Rev. 3
June 2001
Four-Cable Transceiver/Arbiter Device
FW804 PHY
IEEE
1394A
43
50
56
37
42
49
55
36
46
53
59
40
TPB0+
TPB1+
TPB2+
TPB3+
TPB0
TPB1
TPB2
TPB3–
TPBIAS0
TPBIAS1
TPBIAS2
TPBIAS3
V
DD
Analog I/O
Portn, Port Cable Pair B.
TPBn is the port B connection to the twisted-
pair cable. Board traces from each pair of positive and negative differen-
tial signal pins should be kept matched and as short as possible to the
external load resistors and to the cable connector.
Analog I/O
Portn, Port Cable Pair B.
TPBn is the port B connection to the twisted-
pair cable. Board traces from each pair of positive and negative differen-
tial signal pins should be kept matched and as short as possible to the
external load resistors and to the cable connector.
Analog I/O
Portn, Twisted-Pair Bias.
TPBIAS provides the 1.86 V nominal bias
voltage needed for proper operation of the twisted-pair cable drivers and
receivers and for sending a valid cable connection signal to the remote
nodes.
6, 29, 30, 68,
69, 79
34, 35, 47,
48, 54, 62, 63
3, 16, 20, 21,
28, 70, 80
41, 60, 61,
64, 65
76
—
Digital Power.
V
DD
supplies power to the digital portion of the device.
V
DDA
—
Analog Circuit Power.
V
DDA
supplies power to the analog portion of the
device.
Digital Ground.
All V
SS
signals should be tied to the low-impedance
ground plane.
Analog Circuit Ground.
All V
SSA
signals should be tied together to a
low-impedance ground plane.
Crystal Oscillator.
XI and XO connect to a 24.576 MHz parallel reso-
nant fundamental mode crystal. Although, when a 24.576 MHz clock
source is used, it can be connected to XI with XO left unconnected. The
optimum values for the external shunt capacitors are dependent on the
specifications of the crystal used. It is suggested that two 12 pF shunt
capacitors be used for a crystal with a specified
7
pF loading capaci-
tance. For more details, see Crystal Selection Considerations in Applica-
tion Information section.
V
SS
—
V
SSA
—
XI
—
77
XO
Signal Information
(continued)
Table 1. Signal Descriptions
(continued)
Pin
Signal
*
Type
Name/Description
* Active-low signals are indicated by “/” at the beginning of signal names, within this document.
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相關代理商/技術參數(shù) |
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| FW804-09-DB | 制造商:AGERE 制造商全稱:AGERE 功能描述:PHY IEEE 1394A Four-Cable Transceiver/Arbiter Device |
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