參數(shù)資料
型號: FT2232HL-TRAY
廠商: FTDI, Future Technology Devices International Ltd
文件頁數(shù): 32/67頁
文件大?。?/td> 0K
描述: IC USB HS DUAL UART/FIFO 64-LQFP
標準包裝: 160
系列: USBmadeEZ-FIFO,F(xiàn)T-X,X-Chip
特點: USB 至 UART 和(或)FIFO、SPI、I2C、JTAG
通道數(shù): 2,DUART
FIFO's: 4096 字節(jié)
規(guī)程: RS232,RS422,RS485
電源電壓: 3 V ~ 3.6 V
帶并行端口:
帶自動流量控制功能:
帶調制解調器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應商設備封裝: 64-LQFP
包裝: 托盤
其它名稱: FT2232HL - TRAY
Copyright 2012 Future Technology Devices International Limited
38
Document No.: FT_000061
FT2232H DUAL HIGH SPEED USB TO MULTIPURPOSE UART/FIFO IC
Version 2.21
Clearance No.: FTDI#77
4.8.1
Outgoing Fast Serial Data
To send fast serial data out of the FT2232H, the external device must drive the FSCLK clock. If the
FT2232H has data ready to send, it will drive FSDO output low to indicate the start bit. It will not do this
if it is currently receiving data from the external device. This is illustrated in Figure 4.14.
FSCLK
FSDO
0
D0
D1
D2
D3
D4
D5
D6
D7
SRCE
Start
Bit
Data Bits - LSB first
Source
Bit
Figure 4.14 Fast Opto-Isolated Serial Interface Output Data
Notes :-
1. The first bit output (Start bit) is always 0.
2. FSDO is always sent LSB first.
3. The last serial bit output is the source bit (SRCE). It indicates which channel the data has come
from. A 0 means that it has come from Channel A, a 1 means that it has come from Channel B.
4. If the target device is unable to accept the data when it detects the START bit, it should stop the
FSCLK until it can accept the data.
4.8.2
Incoming Fast Serial Data
An external device is allowed to send data into the FT2232H if FSCTS is high. On receipt of a zero START
bit on FSDI, the FT2232H will drop FSCTS on the next positive clock edge. The data from bits 0 to 7 are
then clocked in (LSB first). The last bit (DEST) determines where the data will be written to. The data can
be sent to either channel A or to channel B. If DEST= 0, the data is sent to channel A, (assuming
channel A is enabled for fast serial mode, otherwise the data is sent to channel B). If DEST= 1 the data
is sent to channel B, (assuming channel B is enabled for fast serial mode, otherwise the data will go to
channel A. (Either channel A, channel B or both channels must be enabled as fast serial mode or the
function is disabled). This is illustrated in Figure 4.15.
FSCLK
FSDI
0
D0
D1
D2
D3
D4
D5
D6
D7
DEST
Start
Bit
Data Bits - LSB first
Destination
Bit
FSCTS
Figure 4.15 Fast Opto-Isolated Serial Interface Input Data
Notes :-
1. The first bit input (Start bit) is always 0.
2. FSDI is always received LSB first.
3. The last received serial bit is the destination bit (DEST).It indicates which channel the data should
go to. A 0 means that it should go to channel A, a 1 means that it should go to channel B.
4. The target device should ensure that CTS is high before it sends data. CTS goes low after data bit
0 (D0) and stays low until the chip can accept more data.
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