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參數(shù)資料
| 型號： | FSB50825US |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 電源模塊 |
| 英文描述： | DC-DC REG PWR SUPPLY MODULE |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 297K |
| 代理商： | FSB50825US |
4
www.fairchildsemi.com
FSB50825US Rev. A
FSB50825US
Smart
Powe
rMod
u
le
(SPM)
Recommended Operating Conditions
Note:
(1) It is recommended the bootstrap diode D1 to have soft and fast recovery characteristics with 400-V rating
(2) Parameters for bootsrap circuit elements are dependent on PWM algorithm. For 15 kHz of switching frequency, typical example of parameters is shown above.
(3) RC coupling(R5 and C5) at each input (indicated as dotted lines) may be used to prevent improper input signal due to surge noise. Signal input of SPM
is compatible with
standard CMOS or LSTTL outptus.
(4) Bold lines should be short and thick in PCB pattern to have small stray inductance of circuit, which results in the reduction of surge voltage. Bypass capacitors such as C1, C2
and C3 should have good high-frequency characteristics to absorb high-frequency ripple current.
Figure 2. Recommended CPU Interface and Bootstrap Circuit with Parameters
Note:
Attach the thermocouple on top of the heatsink-side of SPM (between SPM and heatsink if applied) to get the correct temperature measurement.
Figure 3. Case Temperature Measurement
Symbol
Parameter
Conditions
Value
Units
Min.
Typ.
Max.
VPN
Supply Voltage
Applied between P and N
-
150
200
V
VCC
Control Supply Voltage
Applied between VCC and COM
13.5
15
16.5
V
VBS
High-side Bias Voltage
Applied between VB and output(U, V, W)
13.5
15
16.5
V
VIN(ON)
Input ON Threshold Voltage
Applied between IN and COM
3.0
-
VCC
V
VIN(OFF)
Input OFF Threshold Voltage
0
-
0.6
V
tdead
Blanking Time for Preventing
Arm-short
VCC=VBS=13.5 ~ 16.5V, TJ ≤ 150°C
1.0
-
μs
fPWM
PWM Switching Frequency
TJ ≤ 150°C
-
15
-
kHz
COM
VCC
LIN
HIN
VB
HO
VS
LO
P
N
R
3
Inverter
Output
C
3
R
1
D
1
C
1
R
2
Micom
15-V Line
10
μF
One-Leg Diagram of SPM
These values depend on PWM
control algorithm
* Example of bootstrap paramters:
C
1 = C2 = 1μF ceramic capacitor,
R
1 = 56Ω, R2 = 20Ω
R
5
C
5
HIN
LIN
V
DC
0
1
0
1
Open
Output
Z
0
V
DC
Forbidden
Z
Note
Both FRFET Off
Low-side FRFET On
High-side FRFET On
Shoot-through
Same as (0, 0)
C
2
Case Tem perature(Tc)
Detecting Point
14.50mm
3.80mm
MOSFET
Case Tem perature(Tc)
Detecting Point
14.50mm
3.80mm
MOSFET
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