- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄67505 > FMS9875KGC100X (FAIRCHILD SEMICONDUCTOR CORP) 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100 PDF資料下載
參數(shù)資料
| 型號： | FMS9875KGC100X |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | ADC |
| 英文描述： | 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100 |
| 封裝： | MQFP-100 |
| 文件頁數(shù)： | 28/31頁 |
| 文件大小： | 517K |
| 代理商： | FMS9875KGC100X |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁當(dāng)前第28頁第29頁第30頁第31頁
PRODUCT SPECIFICATION
FMS9875
6
REV. 1.2.15 1/14/02
Register Denitions
PHASE7-0
0B
Sampling clock phase. PHASE4-0 stored in upper
register bits 7-3. PHASE sets the sampling clock phase in
11.25° increments. Default value is decimal 16.
80
PLLCTRL
0C
PLL Control.
24
CONFIG 2
0D
Configuration Register No. 2.
00
0E
Clamp Control Register.
00
0F
Reserved.
00
PLL Control Register (01)
Bit no.
Name
Type
Description
1-0
SUBDIV1-0
R/W
PLL Subdivide ratio. Selects the ratio of the divider following the PLL.
00: divide-by 1
01: divide-by 2
10: divide-by 4
11: reserved
2
PLLFAZ
R/W
PLL Sub-divider Phase. Selects the phase of the divide-by-2 output.
(Invalid for other outputs)
3
–
R/W
Reserved.
7-4
PLLN3-0
R/W
PLL divide ratio, LSBs. PLLN + 1 = total number of pixels per horizontal line.
Conguration Register 1 (0A)
Bit no.
Name
Type
Description
0
1
XCKSEL
R/W
External Clock Select. Select internal clock source.
0: Internal PLL
1: XCK input.
2
XCLAMPOL
R/W
External Clamp Polarity. Select clamp polarity.
0: Active L.
1: Active H.
3
XCLAMP
R/W
External Clamp Select. Select clamp source.
0: Internally generated by PLL referenced to HSIN.
1: External CLAMP input.
4
COASTPOL
R/W
Coast Polarity. Select COAST input polarity.
0: Active L.
1: Active H.
5
HSPOL
R/W
HSIN Polarity. Select horizontal sync input polarity. PLL is locked to selected
edge:
0: Falling edge.
1: Rising edge.
6—
R
1:
7—
R
1:
Name
Address
Function
Default (hex)
PHASE4–0
X X X
SUBDIV1–0
XXXX
PLLN3–0
X X X
X
XX
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| FMS9875KGC140 | 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100 |
| FMS9875KGC140X | 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100 |
| FN3410-10-44 | 500 V, 50 HZ, THREE PHASE EMI FILTER |
| FN3410-110-35 | 500 V, 50 HZ, THREE PHASE EMI FILTER |
| FN3410-13-44 | 500 V, 50 HZ, THREE PHASE EMI FILTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FMS9875KGC140 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| FMS9875KGC140X | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| FMS9875KWC | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| FMS9884A | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:3x8-Bit, 108/140/175 Ms/s Triple Video A/D Converter with Clamps |
| FMS9884AKAC100 | 功能描述:視頻模擬/數(shù)字化轉(zhuǎn)換器集成電路 MQFP RoHS:否 制造商:Texas Instruments 輸入信號類型:Differential 轉(zhuǎn)換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉(zhuǎn)換速率:3 Gbps 分辨率:8 bit 結(jié)構(gòu): 輸入電壓:3.3 V 接口類型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。