參數(shù)資料
型號: FLF Series
英文描述: High Density FLASH Memory Card 16, 32, 48, 64, 80 MB(16, 32, 48, 64, 80 M字節(jié)高密度閃速存儲器卡)
中文描述: 高密度閃存卡16,32,48,64,80 MB的(16,32,48,64,80米字節(jié)高密度閃速存儲器卡)
文件頁數(shù): 3/13頁
文件大?。?/td> 154K
代理商: FLF SERIES
June 2000 Rev. 3 - ECO #12871
3
PCMCIA Flash Memory Card
FLF Series
PC Card Products
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Signal name
GND
DQ3
DQ4
DQ5
DQ6
DQ7
CE1#
A10
OE#
A11
A9
A8
A13
A14
WE#
RDY/BSY
#
Vcc
Vpp1
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
WP
GND
I/O
Function
Ground
Data bit 3
Data bit 4
Data bit 5
Data bit 6
Data bit 7
Card enable 1
Address bit 10
Output enable
Address bit 11
Address bit 9
Address bit 8
Address bit 13
Address bit 14
Write Enable
Ready/Busy
Supply Voltage
Prog. Voltage
Address bit 16
Address bit 15
Address bit 12
Address bit 7
Address bit 6
Address bit 5
Address bit 4
Address bit 3
Address bit 2
Address bit 1
Address bit 0
Data bit 0
Data bit 1
Data bit 2
Write Potect
Ground
Active
Pin
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
Signal name I/O
GND
CD1#
DQ11
DQ12
DQ13
DQ14
DQ15
CE2#
VS1
RFU
RFU
A17
A18
A19
A20
A21
Vcc
Vpp2
A22
A23
A24
A25
VS2
RST
Wait#
RFU
REG#
BVD2
BVD1
DQ8
DQ9
DQ10
CD2#
GND
Function
Ground
Card Detect 1
Data bit 11
Data bit 12
Data bit 13
Data bit 14
Data bit 15
Card Enable 2
Voltage Sense 1
Reserved
Reserved
Address bit 17
Address bit 18
Address bit 19
Address bit 20
Address bit 21
Supply Voltage
Prog. Voltage
Address bit 22
Address bit 23
Address bit 24
Address bit 25
Voltage Sense 2
Card Reset
Extended Bus cycle
Reserved
Attrib Mem Select
Bat. Volt. Detect 2
Bat. Volt. Detect 1
Data bit 8
Data bit 9
Data bit 10
Card Detect 2
Ground
Active
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
I
I
O
O
LOW
I/O
I/O
I/O
I/O
I
I
O
LOW
LOW
NC (2)
LOW
I
I
I
I
I
LOW
LOW(1)
N.C.
N.C.
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
O
I
O
N.C.
HIGH
LOW(3)
I
O
O
(3)
(3)
I/O
I/O
I/O
O
I/O
I/O
O
O
HIGH
LOW
Pinout
Notes:
1. RDY/BSY signal is an open drain type output, pull-up resistors are required on the host side.
2. VS1 is connected to GND for 3.3V/5V cards and N.C. for 5V only cards.
3. Wait#, BVD1 and BVD2 are internally connected to Vcc by resistors for compatibility.
Mechanical
MIN.
1.6mm
±
0.05
0.063”
10.0mm MIN
0.400”
5.0mm
±
T1
0.197”
1.0mm
±
0.05
0.039’
85.6mm
±
0.20
3.370”
3.0mm
54.0mm
±
0.10
2.126”
1.0mm
±
0.05
0.039’
Substrate area
Interconnect area
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