參數(shù)資料
型號: FEDS81V26000-01
廠商: OKI SEMICONDUCTOR CO., LTD.
英文描述: 1,114,112-Word X 24-Bit Field Memory
中文描述: 1114112字× 24位場記憶
文件頁數(shù): 6/20頁
文件大小: 160K
代理商: FEDS81V26000-01
FEDS81V26000-02
OKI Semiconductor
MS81V26000
6/20
The latency for the read operation control by RE is 4. After read reset, RE must remain low for more than 1600 ns
(tFRD). After read reset, the read data at address 0 is output after a time tRL from the cycle in which WE is brought
high.
After read reset, RE should be remained high for 2 cycles after driving RE high first.
Output Enable: OE
OE is used to enable/disable the outputs. OE high level enables the outputs. The internal read address pointer is
always incremented by cycling SRCK regardless of the OE level. Note that OE setup and hold times are referenced
to the rising edge of SRCK. The latency for the read operation control by OE is 4.
Read Address Input: RAD
These pins are used for read address input.
相關(guān)PDF資料
PDF描述
FEDS82V16520A-01 262,144-Word 】 32-Bit 】 2-Bank SGRAM
FEDS82V48540-01 393,216-Word 】 32-Bit 】 4-Bank FIFO-SGRAM
FEP16AT Fast Rectifiers (Glass Passivated)
FEP16DT DIODE SM SCHOT C-2PF SOT-23 SINGLE
FEP16DTA Fast Rectifiers (Glass Passivated)
相關(guān)代理商/技術(shù)參數(shù)
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