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參數(shù)資料
| 型號： | FC15A140CC |
| 廠商： | ATMEL CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, CDIP20 |
| 封裝： | 0.300 INCH, CERAMIC, DIP-20 |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 382K |
| 代理商： | FC15A140CC |
FC15A140
2/16
ABSOLUTE MAXIMUM RATINGS
(see note)
Parameter
Symbol
Comments
Value
Unit
Positive supply voltage
VDD_LOG
VDD_ANA
VDD_BUF
GND to 6.5
V
Analog input voltages
OFFSET
GND to VDD_ANA
V
Front plane, Test pin
FPL, TEST
GND to VDD
V
Digital input voltage
GAIN
RESET
SHUTTER
PCLK
GND to VDD
V
Digital output current
ID
± 12.8
mA
Die temperature
Tj
0 to +75
°C
Storage temperature
Tstg
-20 to +80
°C
Lead temperature (soldering 10 s)
Tleads
Socket mandatory
Forbidden
°C
Note :
Absolute maximum ratings are limiting values, to be applied individually, while other parameters are within specified opera-
ting conditions.
Long exposure to maximum ratings may affect device reliability.
ESD RATING (TBD)
The power supplies must be applied before all the other signals to prevent from damage occurring on the device.
RECOMMENDED CONDITIONS OF USE
Parameter
Symbol
Comments
Min.
Typ.
Max.
Unit
Positive supply voltage
VDD_LOG
VDD_BUF
VDD_ANA
All power supplies
must be short–cir-
cuited and decoupled
with an external
100 nF chip capacitor.
4.5
5.0
5.5
V
Front plane, Test pin
FPL, TEST
Must be grounded.
GND
V
Analog input voltages
OFFSET
Must be decoupled
with an external 10 nF
chip capacitor. See
functional desc.
2.4
2.5
2.7
V
Digital input voltage
GAIN
RESET
SHUTTER
PCLK
GND
TTL/CMOS levels
VCC
TTL/CMOS levels
V
Digital load
CL
25
pF
Analog load
CA
+10 k
W
10
pF
Operating temperature range
Tamb
Civil : ”C” grade
0 to +70
°C
Duty cycle
DC
PCLK
20
50
80
%
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