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參數(shù)資料
| 型號： | FBL2031BB |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | 9-bit BTL 3.3V latched/registered/pass-thru Futurebus transceiver |
| 中文描述： | FBL SERIES, 9-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PQFP52 |
| 封裝： | SOT-379, 52 PIN |
| 文件頁數(shù)： | 5/16頁 |
| 文件大?。?/td> | 165K |
| 代理商： | FBL2031BB |
Philips Semiconductors
Product specification
FBL2031
9-bit BTL 3.3V latched/registered/pass-thru
Futurebus+ transceiver
2000 Apr 18
5
FUNCTION TABLE
MODE
INPUTS
OEA
L
OUTPUTS
An
input
An
L
Bn*
—
OEB0
H
OEB1
L
LCAB
X
LCBA
X
SEL0
H
SEL1
L
Bn
H**
An to Bn thru mode
H
—
H
L
L
X
X
H
L
input
L
An to Bn transparent latch
L
—
H
L
L
L
X
L
L
input
H**
H
—
H
L
L
L
↑
↑
X
L
L
input
L
An to Bn latch and read
l
—
H
L
L
X
L
L
input
H**
h
—
H
L
L
X
L
L
input
L
Bn outputs latched and read
(preconditioned latch)
X
—
H
L
X
H
X
L
L
X
latched
data
H**
An to Bn register
l
—
H
L
L
↑
↑
X
X
X
H
input
h
—
H
L
L
X
X
H
input
L
Bn to An thru mode
—
L
Disable
H
X
H
L
H
input
—
H
Disable
H
X
X
H
L
L
input
—
L
Disable
H
X
L
L
L
H
input
Bn to An transparent latch
—
H
Disable
H
X
L
L
L
L
input
—
L
Disable
H
X
L
H
H
H
input
—
H
Disable
H
X
L
↑
↑
↑
↑
H
H
L
input
—
l
Disable
H
X
L
L
H
input
Bn to An latch and read
—
h
Disable
H
X
L
L
L
input
—
l
Disable
H
X
H
H
H
input
—
h
Disable
H
X
H
H
L
input
An outputs latched and read
(preconditioned latch)
—
X
X
X
H
X
H
L
L
latched
data
latched
data
H
X
—
X
X
X
H
X
H
H
H
X
Bn to An register
—
l
Disable
H
X
↑
↑
X
L
H
input
—
h
Disable
H
X
L
H
L
input
Disable Bn outputs
X
X
L
X
X
X
X
X
X
H**
X
X
X
H
X
X
X
X
X
X
H**
Disable An outputs
X
X
X
X
L
X
X
X
X
Z
X
FUNCTION SELECT TABLE
MODE SELECTED
SEL0
SEL1
Thru mode
H
L
Register mode (An to Bn)
X
H
Latch mode (An to Bn)
L
L
Register mode (Bn to An)
L
H
Latch mode (Bn to An)
L
L
H
H
NOTES:
H
L
l
=
=
=
High voltage level
Low voltage level
Low voltage level one set-up time prior to the Low-to-High
LCXX transition
High voltage level one set-up time prior to the Low-to-High
LCXX transition
Don’t care
h
=
X
=
Z
—
↑
H** =
Bn* =
=
=
=
High-impedance (OFF) state
Input not externally driven
Low-to-High transition
Goes to level of pull-up voltage
Precaution should be taken to ensure B inputs do not float.
If they do, they are equal to Low state.
Disable =
OEB0 is Low or OEB1 is High.
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相關代理商/技術參數(shù) |
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|---|---|
| FBL2031BB-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9-Bit Bus Transceiver |
| FBL2033 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:3.3V BTL 8-bit latched/registered/pass-thru universal transceiver |
| FBL2033BB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:3.3V BTL 8-bit latched/registered/pass-thru Futurebus universal interface transceiver |
| FBL2040 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:3.3V BTL8-bit TTL to BTL transceiver |
| FBL2040BB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:3.3V BTL8-bit TTL to BTL transceiver |
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