Rev. 1.1
61
C8051F350/1/2/3
Table 5.3. ADC0 Electrical Characteristics
VDD = AV+ = 3.0 V, VREF = 2.5 V External, PGA Gain = 1, MDCLK = 2.4576 MHz,
Decimation Ratio = 1920, –40 to +85 °C unless otherwise noted.
Parameter
Conditions
Min
Typ
Max
Units
24-bit ADC (C8051F350/1)
Resolution
24
bits
No Missing Codes
24
bits
16-bit ADC (C8051F352/3)
Resolution
16
bits
No Missing Codes
16
bits
All Devices
Integral Nonlinearity
—
±15
ppm
FS
Offset Error (Calibrated)
—
±5
—
ppm
Offset Drift vs. Temperature
—10
—
nV/
°C
Gain Error (Calibrated)
—
±0.002
—
%
Gain Drift vs. Temperature
—
±0.5
—
ppm/
°C
Modulator Clock (MDCLK)
—
2.4576
—
MHz
Modulator Sampling Frequency
MDCLK/128
Hz
Output Word Rate
—
1000
sps
Analog Inputs
Analog Input Voltage Range
(AIN+ – AIN–)
PGA Gain = 1, Bipolar
PGA Gain = 1, Unipolar
–VREF
0
—
+VREF
V
Absolute Voltage on AIN+ or AIN–
pin with respect to AGND
Input Buffers OFF
0
—
AV+
V
Input Current
Input Buffer ON
—
± 1.5
30
nA
Input Impedance
Input Buffer OFF,
Gain = 1
—7
—
M
Common Mode Rejection Ratio
DC
50/60 Hz
95
110
100
—
dB
Input Buffers
High Buffer Input Range with respect
to AGND
PGA Gain = 1, 2, 4, or 8
PGA Gain = 16
PGA Gain = 32
PGA Gain = 64 or 128
1.4
1.45
1.5
1.6
—
AV+ – 0.1
AV+ – 0.15
AV+ – 0.2
AV+ – 0.25
V
Low Buffer Input Range with respect
to AGND
PGA Gain = 1, 2, 4, or 8
PGA Gain = 16
PGA Gain = 32
PGA Gain = 64 or 128
0.1
0.15
0.2
0.25
—
AV+ – 1.4
AV+ – 1.45
AV+ – 1.5
AV+ – 1.6
V
Burnout Current Sources
Positive (AIN+) Channel Current
VREF = 2.5 V
0.9
2
2.9
A
Negative (AIN–) Channel Current
VREF = 2.5 V
–0.9
–2
–2.9
A