參數(shù)資料
型號： EVAL-ADUC7024QSZ
廠商： Analog Devices Inc
文件頁數(shù)： 90/104頁
文件大?。?/td> 0K
描述： KIT DEV QUICK START ADUC7024
產(chǎn)品培訓(xùn)模塊： ARM7 Applications & Tools
Intro to ARM7 Core & Microconverters
設(shè)計(jì)資源： ADUC7024 Dev System Schematic/Brd Outline
7024 Gerber Files
標(biāo)準(zhǔn)包裝： 1
系列： QuickStart™ 套件
類型： MCU
適用于相關(guān)產(chǎn)品： ADuC7024
所含物品： 評估板、電源、纜線、軟件和說明文檔
ADuC7019/20/21/22/24/25/26/27/28/29
Data Sheet
Rev. F | Page 86 of 104
Timer1 (General-Purpose Timer)
Timer1 is a general-purpose, 32-bit timer (count down or count
up) with a programmable prescaler. The source can be the
32 kHz external crystal, the core clock frequency, or an external
GPIO (P1.0 or P0.6). The maximum frequency of the clock
input is 44 Mhz). This source can be scaled by a factor of 1, 16,
256, or 32,768.
The counter can be formatted as a standard 32-bit value or as
hours: minutes: seconds: hundredths.
Timer1 has a capture register (T1CAP) that can be triggered by
a selected IRQ source initial assertion. This feature can be used
to determine the assertion of an event more accurately than the
precision allowed by the RTOS timer when the IRQ is serviced.
Timer1 can be used to start ADC conversions as shown in the
block diagram in Figure 78.
04955-
035
32kHz OSCILLATOR
HCLK
P0.6
P1.0
IRQ[31:0]
PRESCALER
/1, 16, 256
OR 32,768
32-BIT
UP/DOWN
COUNTER
32-BIT
LOAD
TIMER1
VALUE
CAPTURE
TIMER1 IRQ
ADC CONVERSION
Figure 78. Timer1 Block Diagram
The Timer1 interface consists of five MMRs: T1LD, T1VAL,
T1CON, T1CLRI, and T1CAP.
Table 177. T1LD Register
Name
Address
Default Value
Access
T1LD
0xFFFF0320
0x00000000
R/W
T1LD is a 32-bit load register.
Table 178. T1VAL Register
Name
Address
Default Value
Access
T1VAL
0xFFFF0324
0xFFFFFFFF
R
T1VAL is a 32-bit read-only register that represents the current
state of the counter.
Table 179. T1CON Register
Name
Address
Default Value
Access
T1CON
0xFFFF0328
0x0000
R/W
T1CON is the configuration MMR described in Table 180.
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