參數(shù)資料
型號: EVAL-ADUC7024QSZ
廠商: Analog Devices Inc
文件頁數(shù): 37/104頁
文件大?。?/td> 0K
描述: KIT DEV QUICK START ADUC7024
產(chǎn)品培訓模塊: ARM7 Applications & Tools
Intro to ARM7 Core & Microconverters
設(shè)計資源: ADUC7024 Dev System Schematic/Brd Outline
7024 Gerber Files
標準包裝: 1
系列: QuickStart™ 套件
類型: MCU
適用于相關(guān)產(chǎn)品: ADuC7024
所含物品: 評估板、電源、纜線、軟件和說明文檔
ADuC7019/20/21/22/24/25/26/27/28/29
Data Sheet
Rev. F | Page 38 of 104
TERMINOLOGY
ADC SPECIFICATIONS
Integral Nonlinearity (INL)
The maximum deviation of any code from a straight line
passing through the endpoints of the ADC transfer function.
The endpoints of the transfer function are zero scale, a point
LSB below the first code transition, and full scale, a point
LSB above the last code transition.
Differential Nonlinearity (DNL)
The difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Offset Error
The deviation of the first code transition (0000 . . . 000) to
(0000 . . . 001) from the ideal, that is, + LSB.
Gain Error
The deviation of the last code transition from the ideal AIN
voltage (full scale 1.5 LSB) after the offset error has been
adjusted out.
Signal to (Noise + Distortion) Ratio (SINAD)
The measured ratio of signal to (noise + distortion) at the
output of the ADC. The signal is the rms amplitude of the
fundamental. Noise is the rms sum of all nonfundamental
signals up to half the sampling frequency (fS/2), excluding dc.
The ratio is dependent upon the number of quantization levels
in the digitization process; the more levels, the smaller the
quantization noise.
The theoretical signal to (noise + distortion) ratio for an ideal
N-bit converter with a sine wave input is given by
Signal to (Noise + Distortion) = (6.02 N + 1.76) dB
Thus, for a 12-bit converter, this is 74 dB.
Total Harmonic Distortion (THD)
The ratio of the rms sum of the harmonics to the fundamental.
DAC SPECIFICATIONS
Relative Accuracy
Otherwise known as endpoint linearity, relative accuracy is a
measure of the maximum deviation from a straight line passing
through the endpoints of the DAC transfer function. It is
measured after adjusting for zero error and full-scale error.
Voltage Output Settling Time
The amount of time it takes the output to settle to within a
1 LSB level for a full-scale input change.
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