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| 型號： | EVAL-ADM2491EEBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 4/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR ADM2491 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 接口，收發(fā)器，RS-485 |
| 已用 IC / 零件： | ADM2491 |
| 已供物品： | 板 |
ADM2491E
Rev. B | Page 12 of 16
CIRCUIT DESCRIPTION
ELECTRICAL ISOLATION
In the ADM2491E, electrical isolation is implemented on the
logic side of the interface. Therefore, the part has two main
sections: a digital isolation section and a transceiver section
(see Figure 25). The driver input signal, which is applied to the
TxD pin and referenced to logic ground (GND1), is coupled
across an isolation barrier to appear at the transceiver section
referenced to isolated ground (GND2). Similarly, the receiver
input, which is referenced to isolated ground in the transceiver
section, is coupled across the isolation barrier to appear at the
RxD pin referenced to logic ground.
i
Coupler Technology
The digital signals are transmitted across the isolation barrier
using iCoupler technology. This technique uses chip scale
transformer windings to couple the digital signals magnetically
from one side of the barrier to the other. Digital inputs are
encoded into waveforms that are capable of exciting the
primary transformer winding. At the secondary winding, the
induced waveforms are decoded into the binary value that was
originally transmitted.
ISOLATION
BARRIER
VDD2
VDD1
Y
Z
A
B
GND2
GND1
TxD
RxD
RE
ENCODE
DECODE
ENCODE
DE
DECODE
ENCODE
D
R
TRANSCEIVER
06985-
025
DIGITAL ISOLATION
Figure 25. ADM2491E Digital Isolation and Transceiver Sections
TRUTH TABLES
The truth tables in this section use the abbreviations shown in
Table 9. Truth Table Abbreviations
Letter
Description
H
High level
L
Low level
I
Indeterminate
X
Irrelevant
Z
High impedance (off)
NC
Disconnected
Table 10. Transmitting
Supply Status
Inputs
Outputs
V
DD1
V
DD2
DE
TxD
Y
Z
On
H
L
On
H
L
H
On
L
X
Z
On
Off
X
Z
Off
On
L
Z
Off
X
Z
Table 11. Receiving
Supply Status
Inputs
Output
V
DD1
V
DD2
A B (V)
RE
RxD
On
>0.2
L or NC
H
On
<0.2
L or NC
L
On
0.2 < A B < +0.2
L or NC
I
On
Inputs open
L or NC
H
On
X
H
Z
On
Off
X
L or NC
H
Off
X
L or NC
L
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