ADM2491E
Rev. B | Page 3 of 16
SPECIFICATIONS
All voltages are relative to their respective ground; 3.0 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V. All minimum/maximum specifications
apply over the entire recommended operation range, unless otherwise noted. All typical specifications are at TA = 25°C, VDD1 = VDD2 =
5.0 V, unless otherwise noted.
Table 1.
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
SUPPLY CURRENT
Power Supply Current, Logic Side
TxD/RxD Data Rate = 2 Mbps
I
DD1
3.0
mA
Unloaded output
TxD/RxD Data Rate = 16 Mbps
I
DD1
6
mA
Half-duplex configuration,
R
Power Supply Current, Bus Side
TxD/RxD Data Rate = 2 Mbps
I
DD2
4.0
mA
Unloaded output
TxD/RxD Data Rate = 16 Mbps
I
DD2
50
mA
V
DD2 = 5.5 V, half-duplex
configuration,
R
DRIVER
Differential Outputs
Differential Output Voltage, Loaded
|V
OD|
2.0
5.0
V
R
1.5
5.0
V
R
1.5
5.0
V
7 V ≤ V
|V
OD| for Complementary Output
States
|V
OD|
0.2
V
R
Common-Mode Output Voltage
V
OC
3.0
V
R
|V
OC| for Complementary Output
States
|V
OC|
0.2
V
R
Output Leakage Current (Y, Z)
I
O
100
A
DE = 0 V, V
DD2 = 0 V or 5 V, VIN = 12 V
100
A
DE = 0 V, V
DD2 = 0 V or 5 V, VIN = 7 V
Short-Circuit Output Current
I
OS
250
mA
Logic Inputs DE, RE, TxD
Input Threshold Low
V
IL
0.25 × V
DD1
V
Input Threshold High
V
IH
0.7 × V
DD1
V
Input Current
I
TxD
10
+0.01
+10
A
RECEIVER
Differential Inputs
Differential Input Threshold Voltage
V
TH
0.2
+0.2
V
Input Voltage Hysteresis
V
HYS
30
mV
V
OC = 0 V
Input Current (A, B)
I
+1.0
mA
V
OC = 12 V
0.8
mA
V
OC = 7 V
Line Input Resistance
R
IN
12
k
Logic Outputs
Output Voltage Low
V
OLRxD
0.2
0.4
V
I
ORxD = 1.5 mA, VA VB = 0.2 V
Output Voltage High
V
OHRxD
V
DD1 0.3
V
DD1 0.2
V
I
ORxD = 1.5 mA, VA VB = 0.2 V
Short-Circuit Current
100
mA
Three-State Output Leakage Current
I
OZR
±1
A
V
DD1 = 5.5 V, 0 V < VOUT < VDD1
COMMON-MODE TRANSIENT IMMUNIT
Y125
kV/s
V
CM = 1 kV, transient magnitude =
800 V
1 CM is the maximum common-mode voltage slew rate that can be sustained while maintaining specification-compliant operation. V
CM is the common-mode potential
difference between the logic and bus sides. The transient magnitude is the range over which the common mode is slewed. The common-mode voltage slew rates
apply to both rising and falling common-mode voltage edges.