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參數(shù)資料
| 型號： | EVAL-ADE7756EB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Active Energy Metering IC with Serial Interface |
| 中文描述： | 有源電能計量IC串行接口 |
| 文件頁數(shù)： | 30/32頁 |
| 文件大?。?/td> | 347K |
| 代理商： | EVAL-ADE7756EB |
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REV. 0
ADE7756
–30–
Mode Register (06H)
The ADE7756 functionality is configured by writing to the MODE register. Table VI summarizes the functionality of each bit in the
MODE register.
Table VI. Mode Register
Bit
Location
Bit
Mnemonic
Description
0
1
2
3
4
DISHPF
DISLPF2
DISCF
DISSAG
ASUSPEND
The HFP (High-Pass Filter) in Channel 1 is disabled when this bit is set.
The LPF (Low-Pass Filter) after the multiplier (LPF2) is disabled when this bit is set.
The frequency output CF is disabled when this bit is set.
The line voltage Sag detection is disabled when this bit is set.
By setting this bit to Logic 1, both ADE7756’s A/D converters can be turned off. In normal
operation, this bit should be left at Logic 0. All digital functionality can be stopped by sus-
pending the clock signal at CLKIN pin.
The temperature conversion starts when this bit is set to one. This bit is automatically reset to
zero when the temperature conversion is finished.
Software Chip Reset. A data transfer should not take place to the ADE7756 for at least 18
μ
s
after a software reset.
Setting this bit to a Logic 1 places the chip in calibration mode.
ADC 1 (Channel 1) inputs are internally shorted together.
ADC 2 (Channel 2) inputs are internally shorted together.
By setting this bit to Logic 1 the analog inputs V2P and V2N are connected to ADC 1 and the
analog inputs V1P and V1N are connected to ADC 2.
These bits are used to select the Waveform Register update rate.
DTRT 1
DTRT0
Update Rate
0
0
27.9 kSPS (CLKIN/128)
0
1
14 kSPS (CLKIN/256)
1
0
7 kSPS (CLKIN/512)
1
1
3.5 kSPS (CLKIN/1024)
These bits are used to select the source of the sampled data for the Waveform Register
WAVSEL1
WAVSEL0
Source
0
0
Active Power signal (output of LPF2)
0
1
RESERVED
1
0
Channel 1
1
1
Channel 2
Writing a Logic 1 to this bit position places the ADE7756 in test mode. This is intended for
factory testing only and should be left at zero.
5
TEMPSEL
6
SWRST
7
8
9
10
CMODE
DISCH1
DISCH2
SWAP
12, 11
DTRT1, 0
14, 13
WAVSEL1, 0
15
TEST1
MODE REGISTER
*
ADDR: 06H
TEST 1
(TEST MODE SELECTION SHOULD BE SET TO 0)
WAVSEL
(WAVE FORM SELECTION FOR SAMPLE MODE)
00 = LPF2
01 = RESERVED
10 = CH1
11 = CH2
DTRT
(WAVE FORM SAMPLES OUTPUT DATA RATE)
00 = 27.9kSPS (CLKIN/128)
01 = 14.4kSPS (CLKIN/256)
10 = 7.2kSPS (CLKIN/512)
11 = 3.6kSPS (CLKIN/1024)
SWAP
(SWAP CH1 AND CH2 ADCs)
DISCH2
(SHORT THE ANALOG INPUTS ON CHANNEL 2)
DISCH1
(SHORT THE ANALOG INPUTS ON CHANNEL 1)
*
REGISTER CONTENTS SHOW POWER-ON DEFAULTS
0
0
0
0
0
0
0
0
7
6
5
4
3
2
1
0
0
0
0
0
1
1
0
0
8
9
10
11
12
13
14
15
DISHPF
(DISABLE HPF IN CHANNEL 1)
DISLPF2
(DISABLE LPF2 AFTER MULTIPLIER)
DISCF
(DISABLE FREQUENCY OUTPUT CF)
DISSAG
(DISABLE
SAG
OUTPUT)
ASUSPEND
(SUSPEND CH1 AND CH2 ADCs)
TEMPSEL
(START TEMPERATURE SENSING)
SWRST
(SOFTWARE CHIP RESET)
CMODE
(CALIBRATION MODE)
Figure 41.
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