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參數(shù)資料
| 型號(hào)： | EVAL-AD7934CB |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | ADC |
| 英文描述： | 4-Channel, 1.5 MSPS, 12-Bit and 10-Bit Parallel ADCs with a Sequencer |
| 中文描述： | 4通道，1.5 MSPS的12位和10位并行ADC的一個(gè)序列 |
| 文件頁數(shù)： | 17/32頁 |
| 文件大小： | 1253K |
| 代理商： | EVAL-AD7934CB |
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Preliminary Technical Data
AD7933/AD7934
Table 9. Analog Input Type Selection
Channel Address
MODE0 = 0, MODE1 = 0
Four Single-Ended I/P
Channels
V
IN+
VIN0
VIN1
VIN2
VIN3
MODE0 = 0, MODE1 = 1
Two Fully Differential
I/P Channels
V
IN+
VIN0
VIN1
VIN2
VIN3
MODE0 = 1, MODE1 = 0
Two Pseudo-Differential
I/P Channels
V
IN+
VIN0
VIN1
VIN2
VIN3
MODE0 = 1, MODE1 = 1
Not Used
ADD1
0
0
1
1
ADD0
0
1
0
1
V
IN
AGND
AGND
AGND
AGND
V
IN
VIN1
VIN0
VIN3
VIN2
V
IN
VIN1
VIN0
VIN3
VIN2
SEQUENCER OPERATION
The configuration of the SEQ0 and SEQ1 bits in the control register allow the user to use the sequencer function. T
two sequencer modes of operation.
Table 10. Sequence Selection Modes
SEQ0
SEQ1
Sequence Type
This configuration is selected when the sequence function is not used. The analog input channel selected on each
individual conversion is determined by the contents of the channel address bits, ADD1 and ADD0, in each prior write
operation. This mode of operation reflects the normal operation of a multichannel ADC, without the sequencer function
being used, where each write to the AD7933/AD7934 selects the next channel for conversion.
0
1
Not Used.
1
0
Not Used.
1
1
This configuration is used in conjunction with the channel address bits, ADD1 and ADD0, to program continuous
conversions on a consecutive sequence of channels from Channel 0 through to a selected final channel as determined by
the channel address bits in the control register. When in differential or pseudo-differential mode, inverse channels (e.g.,
VIN1, VIN0) are not converted in this mode.
outlines the
able 10
0
0
Rev. PrG | Page 17 of 32
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