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參數(shù)資料
| 型號： | EVAL-AD7851CB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 14-Bit 333 kSPS Serial A/D Converter |
| 中文描述： | 14位333 kSPS的串行A / D轉(zhuǎn)換器 |
| 文件頁數(shù)： | 3/36頁 |
| 文件大?。?/td> | 435K |
| 代理商： | EVAL-AD7851CB |
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AD7851
–3–
REV. A
Parameter
A
1
K
1
Units
T est Conditions/Comments
POWER PERFORMANCE
AV
DD,
DV
DD
I
DD
Normal Mode
5
+4.75/+5.25
+4.75/+5.25
V min/max
17
17
mA max
AV
DD
= DV
DD
= 4.75 V to 5.25 V. T ypically
12 mA.
Sleep Mode
6
With External Clock On
20
20
μ
A typ
Full Power-Down. Power management bits
in control register set as PMGT 1 = 1, PMGT 0 = 0.
Partial Power-Down. Power management bits in
control register set as PMGT 1 = 1, PMGT 0 = 1.
T ypically 1
μ
A. Full Power-Down. Power
management bits in control register set as
PMGT 1 = 1, PMGT 0 = 0.
Partial Power-Down. Power management bits in
control register set as PMGT 1 = 1, PMGT 0 = 1.
V
DD
= 5.25 V: T ypically 63 mW;
SLEEP
= V
DD
.
600
600
μ
A typ
With External Clock Off
10
10
μ
A max
300
300
μ
A typ
Normal Mode Power Dissipation
Sleep Mode Power Dissipation
With External Clock On
With External Clock Off
89.25
89.25
mW max
105
52.5
105
52.5
μ
W typ
μ
W max
V
DD
= 5.25 V;
SLEEP
= 0 V
V
DD
= 5.25 V; T ypically 5.25
μ
W;
SLEEP
= 0 V
SYST EM CALIBRAT ION
Offset Calibration Span
7
Gain Calibration Span
7
+0.05
×
V
REF
/–0.05
×
V
REF
+1.025
×
V
REF
/–0.975
×
V
REF
V max/min
V max/min
Allowable Offset Voltage Span for Calibration
Allowable Full-Scale Voltage Span for Calibratio
n
NOT ES
1
T emperature ranges as follows: A Version, –40
°
C to +125
°
C; K Version, 0
°
C to +125
°
C.
2
Specifications apply after calibration.
3
SNR calculation includes distortion and noise components.
4
Sample tested @ +25
°
C to ensure compliance.
5
All digital inputs @ DGND except for
CONVST
,
SLEEP
,
CAL
, and
SYNC
@ DV
. No load on the digital outputs. Analog inputs @ AGND.
6
CLK IN @ DGND when external clock off. All digital inputs @ DGND except for
CONVST
,
SLEEP
,
CAL
, and
SYNC
@ DV
DD
. No load on the digital outputs.
Analog inputs @ AGND.
7
T he offset and gain calibration spans are defined as the range of offset and gain errors that the AD7851 can calibrate. Note also that these are voltage spans and are
not absolute voltages (i.e., the allowable system offset voltage presented at AIN(+) for the system offset error to be adjusted out will be AIN(–)
±
0.05
×
V
REF
, and the
allowable system full-scale voltage applied between AIN(+) and AIN(–) for the system full-scale voltage error to be adjusted out will be V
REF
±
0.025
×
V
REF
). T his is
explained in more detail in the calibration section of the data sheet.
Specifications subject to change without notice.
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相關(guān)代理商/技術(shù)參數(shù) |
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| EVAL-AD7851CB4 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit 333 kSPS Serial A/D Converter |
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| EVAL-AD7858CB | 制造商:Analog Devices 功能描述:EVALUATION CONTROL BOARD - Bulk |
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