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參數(shù)資料
| 型號： | EVAL-AD7851CB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 14-Bit 333 kSPS Serial A/D Converter |
| 中文描述： | 14位333 kSPS的串行A / D轉(zhuǎn)換器 |
| 文件頁數(shù)： | 10/36頁 |
| 文件大?。?/td> | 435K |
| 代理商： | EVAL-AD7851CB |
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AD7851
–10–
REV. A
CONT ROL RE GIST E R
T he arrangement of the control register is shown below. T he control register is a write only register and contains 14 bits of data. T he
control register is selected by putting two 1s in ADDR1 and ADDR0. T he function of the bits in the control register are described
below. T he power-up status of all bits is 0.
MSB
ZERO
ZERO
ZERO
ZERO
PMGT 1
PMGT 0
PMGT 1
RDSL T 0
2/
3
MODE
C ONVST
C AL MD
C AL ST 1
C AL SL T 0
ST C AL
L SB
Control Register Bit Function Description
Bit
Mnemonic
Comment
13
12
11
10
9
8
7
6
5
ZERO
ZERO
ZERO
ZERO
PMGT 1
PMGT 0
RDSLT 1
RDSLT 0
2/
3
MODE
T hese four bits must be set to 0 when writing to the control register.
Power Management Bits. T hese two bits are used with the
SLEEP
pin for putting the part into various
power-down modes (see Power-Down section for more details).
T heses two bits determine which register is addressed for the read operations. See T able II.
Interface Mode Select Bit. With this bit set to 0, Interface Mode 2 is enabled. With this bit set to 1,
Interface Mode 1 is enabled where DIN is used as an output as well as an input. T his bit is set to 0 by
default after every read cycle; thus when using Interface Mode 1, this bit needs to be set to 1 in every
write cycle.
Conversion Start Bit. A logic one in this bit position starts a single conversion, and this bit is automati-
cally reset to 0 at the end of conversion. T his bit may also used in conjunction with system calibration
(see Calibration section on page 21).
Calibration Mode Bit. A 0 here selects self-calibration and a 1 selects a system calibration (see T able III).
Calibration Selection Bits and Start Calibration Bit. T hese bits have two functions.
With the ST CAL bit set to 1, the CALSLT 1 and CALSLT 0 bits determine the type of calibration per-
formed by the part (see T able III). T he ST CAL bit is automatically reset to 0 at the end of calibration.
With the ST CAL bit set to 0, the CALSLT 1 and CALSLT 0 bits are decoded to address the calibration
register for read/write of calibration coefficients (see section on the calibration registers for more details).
4
CONVST
3
2
1
0
CALMD
CALSLT 1
CALSLT 0
ST CAL
T able III. Calibration Selection
CALMD
CALSLT 1
CALSLT 0
Calibration T ype
0
0
0
A
full internal calibration
is initiated where the internal DAC is calibrated followed by the
internal gain error and finally the internal offset error is calibrated out. T his is the default setting.
Here the
internal gain error
is calibrated out followed by the
internal offset error
calibrated
out.
T his calibrates out the
internal offset error
only.
T his calibrates out the
internal gain error
only.
A
full system calibration
is initiated here where first the internal DAC is calibrated, fol-
lowed by the system gain error, and finally the system offset error is calibrated out.
Here the
system gain error
is calibrated out followed by the
system offset error
.
T his calibrates out the
system offset error
only.
T his calibrates out the
system gain error
only.
0
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
0
1
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PDF描述 |
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| EVAL-AD7853CB | 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs |
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| EVAL-AD7856CB | 5 V Single Supply, 8-Channel 14-Bit 285 kSPS Sampling ADC |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-AD7851CB4 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit 333 kSPS Serial A/D Converter |
| EVAL-AD7853CB | 制造商:Analog Devices 功能描述:EVALUATION CONTROL BOARD - Bulk |
| EVAL-AD7854CB | 制造商:Analog Devices 功能描述:EVALUATION CONTROL BOARD - Bulk |
| EVAL-AD7856CB | 制造商:AD 制造商全稱:Analog Devices 功能描述:5 V Single Supply, 8-Channel 14-Bit 285 kSPS Sampling ADC |
| EVAL-AD7858CB | 制造商:Analog Devices 功能描述:EVALUATION CONTROL BOARD - Bulk |
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